Changkyu Kim, Ph.D.
Affiliations: | 2007 | Computer Science | University of Texas at Austin, Austin, Texas, U.S.A. |
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Computer ScienceGoogle:
"Changkyu Kim"Parents
Sign in to add mentor| Douglas C. Burger | grad student | 2007 | UT Austin | |
| (A technology -scalable composable architecture.) | ||||
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Publications
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| Govindaraju V, Ho CH, Nowatzki T, et al. (2012) DySER: Unifying functionality and parallelism specialization for energy-efficient computing Ieee Micro. 32: 38-51 |
| Kim C, Chhugani J, Satish N, et al. (2011) Designing fast architecture-sensitive tree search on modern multicore/many-core processors Acm Transactions On Database Systems. 36 |
| Hughes CJ, Kim C, Chen YK. (2010) Performance and energy implications of many-core caches for throughput computing Ieee Micro. 30: 25-35 |
| Gulati DP, Kim C, Sethumadhavan S, et al. (2008) Multitasking workload scheduling on flexible-core chip multiprocessors Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 187-196 |
| Kumar S, Chhugani J, Kim C, et al. (2008) Second life and the new generation of virtual worlds Computer. 41: 46-53 |
| Gratz P, Kim C, Sankaralingam K, et al. (2007) On-chip interconnection networks of the TRIPS chip Ieee Micro. 27: 41-50 |
| Sankaralingam K, Nagarajan R, Liu H, et al. (2004) TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP Acm Transactions On Architecture and Code Optimization. 1: 62-93 |
| Kim C, Burger D, Keckler SW. (2003) Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches Ieee Micro. 23 |
| Sankaralingam K, Nagarajan R, Liu H, et al. (2003) Exploiting ILP, TLP, and DLP with the polymorphous TRIPS architecture Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 422-433 |