Sobeeh A. Almukhaizim, Ph.D.
Affiliations: | 2007 | Yale University, New Haven, CT |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Sobeeh Almukhaizim"Parents
Sign in to add mentorYiorgos Makris | grad student | 2007 | Yale | |
(Design exploration frameworks for detecting and mitigating transient errors in logic circuits.) |
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Publications
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Saeed SM, Sinanoglu O, Almukhaizim S. (2013) Predictive Techniques for Projecting Test Data Volume Compression Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 1762-1766 |
Almukhaizim S, Bunian S, Sinanoglu O. (2013) Reconfigurable Concurrent Error Detection Adaptive to Dynamicity of Power Constraints Journal of Electronic Testing. 29: 73-86 |
Almukhaizim S, AlQuraishi E, Sinanoglu O. (2011) Test Power Reduction via Deterministic Alignment of Stimulus and Response Bits Journal of Low Power Electronics. 7: 573-584 |
Sinanoglu O, Almukhaizim S. (2011) Unified 2-D X-alignment for improving the observability of response compactors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 1744-1757 |
Almukhaizim S, Sinanoglu O. (2011) Novel hazard-free majority voter for N-modular redundancy-based fault tolerance in asynchronous circuits Iet Computers and Digital Techniques. 5: 306-315 |
Ma J, Tehranipoor M, Sinanoglu O, et al. (2010) Identification of IR-drop hot-spots in defective power distribution network using TDF ATPG Intelligent Decision Technologies. 122-127 |
Almukhaizim S, Bunian S, Sinanoglu O. (2010) Reconfigurable low-power Concurrent Error Detection in logic circuits Intelligent Decision Technologies. 91-96 |
Almukhaizim S, Mohammad M, AlQuraishi E. (2010) Cost-free low-power test in compression-based reconfigurable scan designs Intelligent Decision Technologies. 78-82 |
Almukhaizim S, Alsubaihi S, Sinanoglu O. (2010) On the Application of Dynamic Scan Chain Partitioning for Reducing Peak Shift Power Journal of Electronic Testing. 26: 465-481 |
Almukhaizim S, Shi F, Love E, et al. (2009) Soft-error tolerance and mitigation in asynchronous burst-mode circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 869-882 |