Jia Di, Ph.D.

2004 University of Central Florida, Orlando, FL, United States 
Electronics and Electrical Engineering
"Jia Di"


Sign in to add mentor
Jiann S. Yuan grad student 2004 University of Central Florida
 (Energy aware design and analysis for synchronous and asynchronous circuits.)
BETA: Related publications


You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect.

Men L, Di J. (2014) Asynchronous parallel platforms with balanced performance and energy Journal of Low Power Electronics. 10: 566-579
Arthurs A, Di J. (2012) Analysis of ultra-low voltage digital circuits over process variations 2012 Ieee Subthreshold Microelectronics Conference, Subvt 2012
Coleman D, Di J. (2010) Analysis and improvement of delay-insensitive asynchronous circuits operating in subthreshold regime Journal of Low Power Electronics. 6: 320-324
Smith SC, Di J. (2009) Designing asynchronous circuits using NULL convention logic (NCL) Synthesis Lectures On Digital Circuits and Systems. 23: 1-96
Arthurs A, Di J. (2007) Overflow detection and correction in a fixed-point multiplier 2007 Ieee Region 5 Technical Conference, Tps. 81-85
Di J. (2007) A framework on mitigating single event upset using delay-insensitive asynchronous circuits 2007 Ieee Region 5 Technical Conference, Tps. 354-357
Di J, Yuan JS. (2006) Energy-aware design for multi-rail encoding using NCL Iee Proceedings: Circuits, Devices and Systems. 153: 100-106
Yuan JS, Di J. (2005) Teaching low-power electronic design in electrical and computer engineering Ieee Transactions On Education. 48: 169-182
Di J, Yuan JS. (2005) Energy-aware dual-rail bit-wise completion pipelined multipliers design Conference Proceedings - Ieee Southeastcon. 49-54
Di J, Yuan JS. (2005) Dynamic active-bit detection and operands exchange for designing energy-aware asynchronous multipliers Proceedings of the 2005 International Conference On Computer Design, Cdes'05. 218-223
See more...