Brian Towles, Ph.D.
Affiliations: | 2005 | Stanford University, Palo Alto, CA |
Area:
Electronics and Electrical EngineeringGoogle:
"Brian Towles"Parents
Sign in to add mentor| William J. Dally | grad student | 2005 | Stanford (E-Tree) | |
| (Distributed router fabrics.) | ||||
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Publications
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| Predescu C, Lerer AK, Lippert RA, et al. (2020) The u-series: A separable decomposition for electrostatics computation with improved accuracy. The Journal of Chemical Physics. 152: 084113 |
| Dror RO, Grossman JP, MacKenzie KM, et al. (2011) Overcoming communication latency barriers in massively parallel scientific computation Ieee Micro. 31: 8-19 |
| Singh A, Dally WJ, Towles B, et al. (2004) Globally Adaptive Load-Balanced Routing on Tori Ieee Computer Architecture Letters. 3: 2-2 |
| Khailany B, Dally WJ, Rixner S, et al. (2003) Exploring the VLSI scalability of stream processors Proceedings - International Symposium On High-Performance Computer Architecture. 12: 153-164 |
| Owens JD, Khailany B, Towles B, et al. (2002) Comparing Reyes and OpenGL on a stream architecture Proceedings of the Siggraph/Eurographics Workshop On Graphics Hardware. 47-56 |
| Khailany B, Dally WJ, Chang A, et al. (2002) VLSI design and verification of the imagine processor Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 289-294 |
| Owens JD, Rixner S, Kapasi UJ, et al. (2002) Media processing applications on the imagine stream processor Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 295-302 |
| Khailany B, Dally WJ, Kapasi UJ, et al. (2001) Imagine: Media processing with streams Ieee Micro. 21: 35-46 |