Manan Syal, Ph.D.

Affiliations: 
2005 Virginia Polytechnic and State University, United States 
Area:
Electronics and Electrical Engineering
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"Manan Syal"

Parents

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Michael S. Hsiao grad student 2005 Virginia Tech
 (Static learning for problems in VLSI test and verification.)
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Publications

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Syal M, Chandrasekar K, Vimjam V, et al. (2007) A study of implication based pseudo functional testing Proceedings - International Test Conference
Syal M, Hsiao MS. (2006) New techniques for untestable fault identification in sequential circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1117-1131
Syal M, Arora R, Hsiao MS. (2005) Extended forward implications and dual recurrence relations to identify sequentially untestable faults Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 2005: 453-460
Syal M, Hsiao MS. (2005) VERISEC: VERIfying equivalence of sequential circuits using SAT Proceedings - Ieee International High-Level Design Validation and Test Workshop, Hldvt. 2005: 52-59
Syal M, Natarajan S, Chakravarty S, et al. (2005) Untestable multi-cycle path delay faults in industrial designs Proceedings of the Asian Test Symposium. 2005: 194-201
Vimjam VC, Syal M, Hsiao MS. (2005) Untestable fault identification through enhanced necessary value assignments Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 176-181
Syal M, Hsiao MS. (2004) Untestable fault identification using recurrence relations and impossible value assignments Proceedings of the Ieee International Conference On Vlsi Design. 17: 481-486
Syal M, Chakravarty S, Hsiao MS. (2004) Identifying untestable transition faults in latch based designs with multiple clocks Proceedings - International Test Conference. 1034-1043
Syal M, Hsiao MS, Doreswamy KB, et al. (2003) Efficient implication-based untestable bridge fault identifier Proceedings of the Ieee Vlsi Test Symposium. 2003: 393-398
Syal M, Hsiao MS. (2003) A novel, low-cost algorithm for sequentially untestable fault identification Proceedings -Design, Automation and Test in Europe, Date. 316-321
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