Vishnu C. Vimjam, Ph.D.

Affiliations: 
2007 Virginia Polytechnic and State University, United States 
Area:
Electronics and Electrical Engineering, Computer Science
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"Vishnu Vimjam"

Parents

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Michael S. Hsiao grad student 2007 Virginia Tech
 (Strategies for SAT-based formal verification.)
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Publications

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Vimjam VC, Hsiao MS. (2007) Explicit safety property strengthening in SAT-based induction Proceedings of the Ieee International Conference On Vlsi Design. 63-68
Vimjam VC, Hsiao MS. (2006) Fast illegal state identification for improving SAT-based induction Proceedings - Design Automation Conference. 241-246
Vimjam VC, Hsiao MS. (2006) Efficient fault collapsing via generalized dominance relations Proceedings of the Ieee Vlsi Test Symposium. 2006: 258-263
Vimjam VC, Hsiao MS. (2005) Increasing the deductibility in CNF instances for efficient SAT-based bounded model checking Proceedings - Ieee International High-Level Design Validation and Test Workshop, Hldvt. 2005: 184-191
Vimjam VC, Syal M, Hsiao MS. (2005) Untestable fault identification through enhanced necessary value assignments Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 176-181
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