Kaviraj Chopra, Ph.D.
Affiliations: | 2008 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Computer Science, Electronics and Electrical EngineeringGoogle:
"Kaviraj Chopra"Parents
Sign in to add mentor| David Blaauw | grad student | 2008 | University of Michigan | |
| (Statistical performance analysis and optimization of digital circuits.) | ||||
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Publications
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| Srivastava A, Chopra K, Shah S, et al. (2008) A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 272-285 |
| Blaauw D, Chopra K, Srivastava A, et al. (2008) Statistical timing analysis: From basic principles to state of the art Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 589-607 |
| Rao RR, Chopra K, Blaauw DT, et al. (2007) Computing the soft error rate of a combinational logic circuit using parameterized descriptors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 468-478 |
| Chopra K, Vrudhula S. (2006) Efficient symbolic algorithms for computing the minimum and bounded leakage states Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2820-2832 |
| Blaauw D, Chopra K. (2005) CAD tools for variation tolerance Proceedings - Design Automation Conference. 766 |