Carlos A. Tokunaga, Ph.D.
Affiliations: | 2008 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Electronics and Electrical EngineeringGoogle:
"Carlos Tokunaga"Parents
Sign in to add mentor| David Blaauw | grad student | 2008 | University of Michigan | |
| (Circuits for secure systems.) | ||||
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Publications
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| Meinerzhagen PA, Tokunaga C, Malavasi A, et al. (2019) An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and |
| Cho M, Kim ST, Tokunaga C, et al. (2017) Postsilicon Voltage Guard-Band Reduction in a 22 nm Graphics Execution Core Using Adaptive Voltage Scaling and Dynamic Power Gating Ieee Journal of Solid-State Circuits. 52: 50-63 |
| Kulkarni JP, Tokunaga C, Aseron PA, et al. (2016) A 409 GOPS/W adaptive and resilient domino register file in 22 nm tri-Gate CMOS featuring in-situ timing margin and error detection for tolerance to within-die variation, voltage droop, temperature and aging Ieee Journal of Solid-State Circuits. 51: 117-129 |
| Kim ST, Shih YC, Mazumdar K, et al. (2015) Enabling Wide Autonomous DVFS in a 22 nm Graphics Execution Core Using a Digitally Controlled Fully Integrated Voltage Regulator Ieee Journal of Solid-State Circuits |
| Bowman KA, Tokunaga C, Tschanz JW, et al. (2013) Adaptive and resilient circuits for dynamic variation tolerance Ieee Design and Test. 30: 8-17 |
| Raychowdhury A, Tokunaga C, Beltman W, et al. (2013) A 2.3 nJ/frame voice activity detector-based audio front-end for context-aware system-on-chip applications in 32-nm CMOS Ieee Journal of Solid-State Circuits. 48: 1963-1969 |
| Bowman KA, Tokunaga C, Karnik T, et al. (2013) A 22 nm all-digital dynamically adaptive clock distribution for supply voltage droop tolerance Ieee Journal of Solid-State Circuits. 48: 907-916 |
| Bowman KA, Tokunaga C, Tschanz JW, et al. (2011) All-digital circuit-level dynamic variation monitor for silicon debug and adaptive clock control Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 2017-2025 |
| Bowman KA, Tschanz JW, Lu SLL, et al. (2011) A 45 nm resilient microprocessor core for dynamic variation tolerance Ieee Journal of Solid-State Circuits. 46: 194-208 |
| Raychowdhury A, Tschanz J, Bowman K, et al. (2011) Error detection and correction in microprocessor core and memory due to fast dynamic voltage droops Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 1: 208-217 |