Brian T. Cline, Ph.D.
Affiliations: | 2010 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Electronics and Electrical EngineeringGoogle:
"Brian Cline"Parents
Sign in to add mentorDavid Blaauw | grad student | 2010 | University of Michigan | |
(Managing variability in VLSI circuits.) |
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Publications
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Chang K, Das S, Sinha S, et al. (2019) System-Level Power Delivery Network Analysis and Optimization for Monolithic 3-D ICs Ieee Transactions On Very Large Scale Integration Systems. 27: 888-898 |
Ou J, Cline B, Yeric G, et al. (2017) Efficient DSA-DP hybrid lithography conflict detection and guiding template assignment Proceedings of Spie. 10148 |
Chang K, Acharya K, Sinha S, et al. (2017) Impact and Design Guideline of Monolithic 3-D IC at the 7-nm Technology Node Ieee Transactions On Very Large Scale Integration Systems. 25: 2118-2129 |
Xu X, Lin Y, Li M, et al. (2017) Redundant Local-Loop Insertion for Unidirectional Routing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 1113-1125 |
Pinckney N, Jeloka S, Dreslinski R, et al. (2017) Impact of FinFET on Near-Threshold Voltage Scalability Ieee Design & Test. 34: 31-38 |
Xu X, Cline B, Yeric G, et al. (2016) Standard cell pin access and physical design in advanced lithography Proceedings of Spie. 9780 |
Xu X, Cline B, Yeric G, et al. (2016) Systematic framework for evaluating standard cell middle-of-line robustness for multiple patterning lithography Journal of Micro/ Nanolithography, Mems, and Moems. 15 |
Aitken R, Chandra V, Cline B, et al. (2016) Predicting future complementary metal–oxide–semiconductor technology – challenges and approaches Iet Computers & Digital Techniques. 10: 315-322 |
Clark LT, Vashishtha V, Shifren L, et al. (2016) ASAP7: A 7-nm finFET predictive process design kit Microelectronics Journal. 53: 105-115 |
Xu X, Cline B, Yeric G, et al. (2015) A systematic framework for evaluating standard cell middle-of-line (MOL) robustness for multiple patterning Proceedings of Spie. 9427: 942707 |