Charbel J. Akl, Ph.D.
Affiliations: | 2008 | University of Louisiana at Lafayette, Lafayette, LA, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Charbel Akl"Parents
Sign in to add mentorMagdy Bayoumi | grad student | 2008 | University of Louisiana at Lafayette | |
(Cost-effective interconnect and circuit design methods for high-speed nanometer CMOS VLSI design.) |
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Publications
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Akl CJ, Ayoubi RA, Bayoumi MA. (2009) Post-silicon clock-invert (PSCI) for reducing process-variation induced skew in buffered clock networks Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 794-798 |
Akl CJ, Ayoubi RA, Bayoumi MA. (2009) An effective staggered-phase damping technique for suppressing power-gating resonance noise during mode transition Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 116-119 |
Akl CJ, Bayoumi MA. (2008) Reducing wakeup latency and energy of MTCMOS circuits via keeper insertion Proceedings of the International Symposium On Low Power Electronics and Design. 69-73 |
Akl CJ, Bayoumi MA. (2008) Assumers for high-speed single and multi-cycle on-chip interconnect with low repeater count Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 327-331 |
Akl CJ, Bayoumi MA. (2008) Self-sleep buffer for distributed MTCMOS design Proceedings of the Ieee International Frequency Control Symposium and Exposition. 673-678 |
Akl CJ, Bayoumi MA. (2008) Wiring-area efficient simultaneous bidirectional point-to-point link for inter-block on-chip signaling Proceedings of the Ieee International Frequency Control Symposium and Exposition. 193-200 |
Akl CJ, Bayoumi MA. (2008) Reducing interconnect delay uncertainty via hybrid polarity repeater insertion Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 1230-1239 |
Akl CJ, Bayoumi MA. (2008) Transition skew coding for global on-chip interconnect Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 1091-1096 |
Akl CJ, Bayoumi MA. (2008) Single-phase SP-domino: A limited-switching dynamic circuit technique for low-power wide fan-in logic gates Ieee Transactions On Circuits and Systems Ii: Express Briefs. 55: 141-145 |
Akl CJ, Bayoumi MA. (2008) Feedback-Switch Logic (FSL): A high-speed low-power differential dynamic-like static CMOS Circuit Family Proceedings of the 9th International Symposium On Quality Electronic Design, Isqed 2008. 385-390 |