Sarat C. Maruvada, Ph.D.
Affiliations: | 2006 | University of Illinois at Chicago, Chicago, IL, United States |
Area:
Computer ScienceGoogle:
"Sarat Maruvada"Parents
Sign in to add mentor| Florin Balasa | grad student | 2006 | University of Illinois, Chicago | |
| (Topological placement with symmetry constraints for analog layout design.) | ||||
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Publications
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| Krishnamoorthy K, Maruvada SC, Balasa F. (2007) Topological placement with multiple symmetry groups of devices for analog layout design Proceedings - Ieee International Symposium On Circuits and Systems. 2032-2035 |
| Maruvada SC, Berkman A, Krishnamoorthy K, et al. (2005) Deterministic skip lists in analog topological placement Asicon 2005: 2005 6th International Conference On Asic, Proceedings. 2: 756-759 |
| Balasa F, Maruvada SC, Krishnamoorthy K. (2004) On the exploration of the solution space in analog placement with symmetry constraints Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 177-191 |
| Balasa F, Maruvada SC, Krishnamoorthy K. (2003) Using red-black interval trees in device-level analog placement with symmetry constraints Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2003: 777-782 |
| Maruvada SC, Krishnamoorthy K, Annojvala S, et al. (2003) Placement with symmetry constraints for analog layout using red-black trees Proceedings - Ieee International Symposium On Circuits and Systems. 5 |
| Maruvada SC, Krishnamoorthy K, Balasa F, et al. (2003) Red-Black Interval Trees in Device-Level Analog Placement Ieice Transactions On Fundamentals of Electronics, Communications and Computer Sciences. 3127-3135 |
| Balasa F, Maruvada SC, Krishnamoorthy K. (2002) Efficient solution space exploration based on segment trees in analog placement with symmetry constraints Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 497-502 |
| Maruvada SC, Krishnamoorthy K, Balasa F. (2002) Block placement using the segment tree data structure from computational geometry Midwest Symposium On Circuits and Systems. 2 |
| Balasa F, Maruvada SC. (2001) Using non-slicing topological representations for analog placement Ieice Transactions On Fundamentals of Electronics, Communications and Computer Sciences. 2785-2792 |