Merrick Brownlee, Ph.D.
Affiliations: | 2007 | Oregon State University, Corvallis, OR |
Area:
Electronics and Electrical EngineeringGoogle:
"Merrick Brownlee"Parents
Sign in to add mentorPavan K. Hanumolu | grad student | 2007 | Oregon State | |
(Low noise clocking for high speed serial links.) |
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Publications
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Brownlee M, Hanumolu PK, Moon UK. (2007) A 3.2Gb/s Oversampling CDR with Improved Jitter Tolerance Proceedings of the Ieee 2007 Custom Integrated Circuits Conference, Cicc 2007. 353-356 |
Brownlee M, Hanumolu PK, Mayaram K, et al. (2006) A 0.5-GHz to 2.5-GHz PLL with fully differential supply regulated tuning Ieee Journal of Solid-State Circuits. 41: 2720-2727 |
Brownlee M, Hanumolu PK, Mayaram K, et al. (2006) A 0.5 to 2.5GHz PLL with fully differential supply-regulated tuning Digest of Technical Papers - Ieee International Solid-State Circuits Conference |
Hanumolu PK, Brownlee M, Mayaram K, et al. (2004) Analysis of charge-pump phase-locked loops Ieee Transactions On Circuits and Systems I: Regular Papers. 51: 1665-1674 |
Brownlee M, Hanumolu PK, Moon UK, et al. (2004) The effect of power supply noise on ring oscillator phase noise Conference Proceedings - 2nd Annual Ieee Northeast Workshop On Circuits and Systems, Newcas 2004. 225-228 |