Vinay K. Chippa, Ph.D.

Affiliations: 
2013 Electrical and Computer Engineering Purdue University, West Lafayette, IN, United States 
Area:
Electronics and Electrical Engineering
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"Vinay Chippa"

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Anand Raghunathan grad student 2013 Purdue
 (Scalable effort hardware.)
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Publications

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Chippa VK, Mohapatra D, Roy K, et al. (2014) Scalable effort hardware design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 2004-2016
Venkataramani S, Chippa VK, Chakradhar ST, et al. (2013) Quality programmable vector processors for approximate computing Micro 2013 - Proceedings of the 46th Annual Ieee/Acm International Symposium On Microarchitecture. 1-12
Chippa VK, Roy K, Chakradhar ST, et al. (2013) Managing the quality vs. efficiency trade-off using dynamic effort scaling Transactions On Embedded Computing Systems. 12
Chippa VK, Chakradhar ST, Roy K, et al. (2013) Analysis and characterization of inherent application resilience for approximate computing Proceedings - Design Automation Conference
Chippa VK, Venkataramani S, Chakradhar ST, et al. (2013) Approximate computing: An integrated hardware approach Conference Record - Asilomar Conference On Signals, Systems and Computers. 111-117
Mohapatra D, Chippa VK, Raghunathan A, et al. (2011) Design of voltage-scalable meta-functions for approximate computing Proceedings -Design, Automation and Test in Europe, Date. 950-955
Chippa VK, Mohapatra D, Raghunathan A, et al. (2010) Scalable effort hardware design: Exploiting algorithmic resilience for energy efficiency Proceedings - Design Automation Conference. 555-560
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