Matthew C. Chidester, Ph.D.

Affiliations: 
2001 University of Florida, Gainesville, Gainesville, FL, United States 
Area:
Electronics and Electrical Engineering, Computer Science
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"Matthew Chidester"

Parents

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Alan George grad student 2001 UF Gainesville
 (Parallel simulation and multiple -path execution techniques for chip -multiprocessor architectures.)
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Publications

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Chidester MC, George AD, Radlinski MA. (2003) Multiple-path execution for chip multiprocessors Journal of Systems Architecture. 49: 33-52
Hernandez EA, Chidester MC, George AD. (2001) Journal of Network and Systems Management. 9: 409-434
Ranganathan S, George AD, Todd RW, et al. (2001) Cluster Computing. 4: 197-209
Todd RW, Chidester MC, George AD. (2001) Comparative performance analysis of directed flow control for real-time SCI Computer Networks. 37: 391-406
Gonzalez DM, George AD, Chidester MC. (2001) Performance modeling and evaluation of topologies for low-latency SCI systems Microprocessors and Microsystems. 25: 343-356
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