Henrique Cota Freitas, Ph.D.

Affiliations: 
2004- Computer Science Pontifícia Universidade Católica de Minas Gerais (PUC Minas) 
 2015-2016 Laboratoire d'Informatique de Grenoble (LIG) Université Grenoble Alpes, France 
Area:
Computer Architecture, High-Performance Computing, Parallel Computing, Heterogeneous Computing
Website:
https://www.cart-research.com/team/henrique
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"Henrique Cota de Freitas"
Bio:

Henrique Cota de Freitas received his BS in Computer Science and M. Sc. in Electrical Engineering in 2000 and 2003, respectively, from the Pontifícia Universidade Católica de Minas Gerais (PUC Minas), Belo Horizonte, Brazil, and Ph.D. in Computer Science in 2009 from the Universidade Federal do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil. From 2011 to 2013, he was the Head of the Graduate Program in Informatics at PUC Minas. In 2015-2016, he was a visiting researcher at INRIA and Université Grenoble Alpes, Grenoble, France, funded by the Brazilian Research Council (CNPq). He is a member of IEEE and SBC (Brazilian Computer Society). Henrique is an Associate Professor at PUC Minas.

Parents

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Philippe Olivier Alexandre Navaux grad student 2006-2009 Universidade Federal do Rio Grande do Sul (UFRGS)
 (PhD thesis: Programmable Multi-Cluster NoC Architecture to Support Collective Communication Patterns)
Jean-François Méhaut post-doc 2015-2016 Université Grenoble Alpes
 (Visiting researcher funded by the Brazilian Research Council (CNPq): Manycore Processor Architectures: Performance vs. Energy)
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Publications

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Castro GT, Zárate LE, Nobre CN, et al. (2019) A Fast Parallel K-Modes Algorithm for Clustering Nucleotide Sequences to Predict Translation Initiation Sites. Journal of Computational Biology : a Journal of Computational Molecular Cell Biology. 26: 442-456
Carneiro CA, Garcia FMP, Freitas HC, et al. (2017) Scalable spatio-temporal parallel parameterizable stream-based JPEG-LS encoder Ieice Electronics Express. 14: 20160950-20160950
Penna PH, Inacio EC, Castro M, et al. (2017) Assessing the Performance of the SRR Loop Scheduler with Irregular Workloads Procedia Computer Science. 108: 255-264
Moraes NRMd, Dias SM, Freitas HC, et al. (2016) Parallelization of the next Closure algorithm for generating the minimum set of implication rules Artificial Intelligence Research. 5
Penna PH, Castro M, Freitas HC, et al. (2016) Design methodology for workload-aware loop scheduling strategies based on genetic algorithm and simulation Concurrency and Computation: Practice and Experience. 29: e3933
Souza MA, Penna PH, Queiroz MM, et al. (2016) CAP Bench: a benchmark suite for performance and energy evaluation of low-power many-core processors Concurrency and Computation: Practice and Experience. 29: e3892
Amorim AMP, Oliveira PAC, Freitas HC. (2015) Performance evaluation of single- and multi-hop wireless networks-on-chip with NAS Parallel Benchmarks Journal of the Brazilian Computer Society. 21
Francesquini E, Castro M, Penna PH, et al. (2015) On the energy efficiency and performance of irregular application executions on multicore, NUMA and manycore platforms Journal of Parallel and Distributed Computing. 76: 32-48
Alves MAZ, Freitas HC, Navaux POA. (2011) High Latency And Contention On Shared L2-Cache For Many-Core Architectures Parallel Processing Letters. 21: 85-106
Freitas HC, Santos TGS, Navaux POA. (2008) Design of programmable NoC router architecture on FPGA for multi-cluster NoCs Electronics Letters. 44: 969-971
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