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Kurt Keutzer - Publications

Affiliations: 
Electrical Engineering and Computer Science University of California, Berkeley, Berkeley, CA, United States 
Area:
Computer Architecture & Engineering (ARC); Design, Modeling and Analysis (DMA); Scientific Computing (SCI)
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55 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 You Y, Zhang Z, Hsieh C, Demmel J, Keutzer K. Fast Deep Neural Network Training on Distributed Systems and Cloud TPUs Ieee Transactions On Parallel and Distributed Systems. 30: 2449-2462. DOI: 10.1109/Tpds.2019.2913833  0.327
2016 Keutzer K. Technical Perspective: If I could only design one circuit … Communications of the Acm. 59: 104-104. DOI: 10.1145/2996862  0.312
2014 Gonina E, Friedland G, Battenberg E, Koanantakool P, Driscoll M, Georganas E, Keutzer K. Scalable multimedia content analysis on parallel platforms using python Acm Transactions On Multimedia Computing, Communications and Applications. 10. DOI: 10.1145/2517151  0.745
2013 Iandola FN, Sheffield D, Anderson MJ, Phothilimthana PM, Keutzer K. Communication-minimizing 2D convolution in GPU registers 2013 Ieee International Conference On Image Processing, Icip 2013 - Proceedings. 2116-2120. DOI: 10.1109/ICIP.2013.6738436  0.358
2012 Murphy M, Alley M, Demmel J, Keutzer K, Vasanawala S, Lustig M. Fast l₁-SPIRiT compressed sensing parallel imaging MRI: scalable parallel implementation and clinically feasible runtime. Ieee Transactions On Medical Imaging. 31: 1250-62. PMID 22345529 DOI: 10.1109/Tmi.2012.2188039  0.55
2012 Anderson MJ, Sheffield D, Keutzer K. A predictive model for solving small linear algebra problems in GPU registers Proceedings of the 2012 Ieee 26th International Parallel and Distributed Processing Symposium, Ipdps 2012. 2-13. DOI: 10.1109/IPDPS.2012.11  0.486
2012 Sheffield D, Anderson M, Keutzer K. Automatic generation of application-specific accelerators for FPGAs from python loop nests Proceedings - 22nd International Conference On Field Programmable Logic and Applications, Fpl 2012. 567-570. DOI: 10.1109/FPL.2012.6339372  0.55
2011 Vasanawala S, Murphy M, Alley M, Lai P, Keutzer K, Pauly J, Lustig M. PRACTICAL PARALLEL IMAGING COMPRESSED SENSING MRI: SUMMARY OF TWO YEARS OF EXPERIENCE IN ACCELERATING BODY MRI OF PEDIATRIC PATIENTS. Proceedings / Ieee International Symposium On Biomedical Imaging: From Nano to Macro. Ieee International Symposium On Biomedical Imaging. 2011: 1039-1043. PMID 24443670 DOI: 10.1109/ISBI.2011.5872579  0.458
2011 Pankratius V, Schulte W, Keutzer K. Guest Editors' Introduction: Parallelism on the Desktop Ieee Software. 28: 14-16. DOI: 10.1109/Ms.2011.8  0.506
2011 Anderson M, Ballard G, Demmel J, Keutzer K. Communication-avoiding QR decomposition for GPUs Proceedings - 25th Ieee International Parallel and Distributed Processing Symposium, Ipdps 2011. 48-58. DOI: 10.1109/IPDPS.2011.15  0.515
2011 Sundaram N, Keutzer K. Long term video segmentation through pixel level spectral clustering on GPUs Proceedings of the Ieee International Conference On Computer Vision. 475-482. DOI: 10.1109/ICCVW.2011.6130281  0.566
2011 Anderson M, Catanzaro B, Chong J, Gonina E, Keutzer K, Lai CY, Murphy M, Su BY, Sundaram N. PALLAS: Mapping applications onto manycore Multiprocessor System-On-Chip: Hardware Design and Tool Integration. 89-113. DOI: 10.1007/978-1-4419-6460-1_4  0.685
2011 Dixon MF, Chong J, Keutzer K. Accelerating Value-at-Risk estimation on highly parallel architectures Concurrency and Computation: Practice and Experience. 24: 895-907. DOI: 10.1002/Cpe.1790  0.619
2010 Catanzaro B, Keutzer K. Parallel computing with patterns and frameworks Xrds: Crossroads, the Acm Magazine For Students. 17: 22-27. DOI: 10.1145/1836543.1836552  0.777
2010 Catanzaro B, Fox A, Keutzer K, Patterson D, Su BY, Snir M, Olukotun K, Hanrahan P, Chafi H. Ubiquitous parallel computing from Berkeley, Illinois, and Stanford Ieee Micro. 30: 41-55. DOI: 10.1109/Mm.2010.42  0.774
2010 Sundaram N, Brox T, Keutzer K. Dense point trajectories by GPU-accelerated large displacement optical flow Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6311: 438-451. DOI: 10.1007/978-3-642-15549-9_32  0.565
2009 Keutzer K, Li P, Shang L, Zhou H. ACM Transactions on Design Automation of Electronic Systems (TODAES) special section call for papers: Parallel CAD: Algorithm design and programming Acm Transactions On Design Automation of Electronic Systems. 15: 9. DOI: 10.1145/1640457.1640466  0.353
2009 You K, Chong J, Yi Y, Gonina E, Hughes CJ, Chen YK, Sung W, Keutzer K. Parallel scalability in speech recognition: Inference engines in large vocabulary continuous speech recognition Ieee Signal Processing Magazine. 26: 124-135. DOI: 10.1109/Msp.2009.934124  0.728
2009 Satish N, Sundaram N, Keutzer K. Optimizing the use of GPU memory in applications with large data sets 16th International Conference On High Performance Computing, Hipc 2009 - Proceedings. 408-418. DOI: 10.1109/HIPC.2009.5433185  0.766
2008 Hwu W, Keutzer K, Mattson TG. The Concurrency Challenge Ieee Design & Test of Computers. 25: 312-320. DOI: 10.1109/Mdt.2008.110  0.475
2007 Satish N, Ravindran K, Keutzer K. A decomposition-based constraint optimization approach for statically scheduling task graphs with communication delays to multiprocessors Proceedings -Design, Automation and Test in Europe, Date. 57-62. DOI: 10.1109/DATE.2007.364567  0.748
2007 Mihal A, Weber S, Keutzer K. Sub-RISC processors Customizable Embedded Processors. 303-336. DOI: 10.1016/B978-012369526-0/50014-0  0.663
2007 Chinnery D, Keutzer K. Linear programming for multi-Vth and multi-Vdd assignment Closing the Power Gap Between Asic and Custom: Tools and Techniques For Low Power Design. 151-188. DOI: 10.1007/978-0-387-68953-1_7  0.751
2007 Chinnery D, Keutzer K. Linear programming for gate sizing Closing the Power Gap Between Asic and Custom: Tools and Techniques For Low Power Design. 121-149. DOI: 10.1007/978-0-387-68953-1_6  0.772
2007 Chinnery D, Keutzer K. Pipelining to reduce the power Closing the Power Gap Between Asic and Custom: Tools and Techniques For Low Power Design. 55-88. DOI: 10.1007/978-0-387-68953-1_3  0.764
2007 Chinnery D, Keutzer K. Overview of the factors affecting the power consumption Closing the Power Gap Between Asic and Custom: Tools and Techniques For Low Power Design. 11-53. DOI: 10.1007/978-0-387-68953-1_2  0.747
2007 Chinnery D, Keutzer K. Preface Closing the Power Gap Between Asic and Custom: Tools and Techniques For Low Power Design. v-vi. DOI: 10.1007/978-0-387-68953-1  0.692
2005 Ravindran K, Satish N, Jin Y, Keutzer K. An FPGA-based soft multiprocessor system for IPV4 packet forwarding Proceedings - 2005 International Conference On Field Programmable Logic and Applications, Fpl. 2005: 487-492. DOI: 10.1109/FPL.2005.1515769  0.78
2005 Shah N, Plishker W, Ravindran K, Gries M, Weber S, Mihal A, Kulkarni C, Moskewicz M, Sauer C, Keutzer K. Successfully deploying the ASIP Building Asips: the Mescal Methodology. 179-225. DOI: 10.1007/0-387-26128-1_6  0.752
2004 Shah N, Plishker W, Ravindran K, Keutzer K. NP-click: A productive software development approach for network processors Ieee Micro. 24: 45-54. DOI: 10.1109/Mm.2004.53  0.774
2002 Orshansky M, Milor L, Chen P, Keutzer K, Hu C. Impact of spatial intrachip gate length variability on the performance of high-speed digital circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 544-553. DOI: 10.1109/43.998626  0.615
2002 August DI, Keutzer K, Malik S, Newton AR. A disciplined approach to the development of platform architectures Microelectronics Journal. 33: 881-890. DOI: 10.1016/S0026-2692(02)00069-1  0.419
2001 Keutzer K. Bright future for programmable processors Ieee Design & Test of Computers. 18: 7-8. DOI: 10.1109/Mdt.2001.970416  0.375
2001 Bergamaschi R, Bolsens I, Gupta R, Harr R, Jerraya A, Keutzer K, Olukotun K, Vissers K. Are single-chip multiprocessors in reach? Ieee Design and Test of Computers. 18: 82-89. DOI: 10.1109/Mdt.2001.902825  0.31
2001 Tasiran S, Keutzer K. Coverage metrics for functional validation of hardware designs Ieee Design & Test of Computers. 18: 36-45. DOI: 10.1109/54.936247  0.321
2001 Fallah F, Devadas S, Keutzer K. OCCOM-efficient computation of observability-based code coverage metrics for functional verification Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 1003-1015. DOI: 10.1109/43.936381  0.399
2001 Fallah F, Devadas S, Keutzer K. Functional vector generation for HDL models using linear programming and Boolean satisfiability Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 994-1002. DOI: 10.1109/43.936380  0.356
2001 Prasad MR, Chong P, Keutzer K. Why is combinational ATPG efficiently solvable for practical VLSI circuits? Journal of Electronic Testing: Theory and Applications (Jetta). 17: 509-527. DOI: 10.1023/A:1012820722053  0.373
2000 Sylvester D, Keutzer K. A global wiring paradigm for deep submicron design Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 242-252. DOI: 10.1109/43.828553  0.351
1999 Liao S, Devadas S, Keutzer K. A text-compression-based method for code size minimization in embedded systems Acm Transactions On Design Automation of Electronic Systems. 4: 12-38. DOI: 10.1145/298865.298867  0.386
1999 Sylvester D, Keutzer K. Rethinking deep-submicron circuit design Computer. 32: 25-33. DOI: 10.1109/2.803637  0.34
1998 Liao S, Keutzer K, Tjiang S, Devadas S. A new viewpoint on code generation for directed acyclic graphs Acm Transactions On Design Automation of Electronic Systems. 3: 51-75. DOI: 10.1145/270580.270583  0.349
1998 Liao S, Devadas S, Keutzer K. Code density optimization for embedded DSP processors using data compression techniques Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 601-608. DOI: 10.1109/43.709398  0.39
1998 Liao S, Devadas S, Keutzer K, Tjiang S, Wang A. Design Automation For Embedded Systems. 3: 59-73. DOI: 10.1023/A:1008803430710  0.339
1996 Liao S, Devadas S, Keutzer K, Tjiang S, Wang A. Storage assignment to decrease code size Acm Transactions On Programming Languages and Systems. 18: 235-253. DOI: 10.1145/229542.229543  0.366
1995 Lavagno L, Keutzer K, Sangiovanni-Vincentelli AL. Synthesis of Hazard-Free Asynchronous Circuits with Bounded Wire Delays Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 14: 61-86. DOI: 10.1109/43.363123  0.362
1994 Devadas S, Keutzer K, Malik S, Wang A. Event suppression: improving the efficiency of timing simulation for synchronous digital circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 13: 814-822. DOI: 10.1109/43.285254  0.302
1993 Devadas S, Keutzer K, Malik S, Wang A. Computation of floating mode delay in combinational circuits: practice and implementation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 1924-1936. DOI: 10.1109/43.251156  0.378
1993 Devadas S, Keutzer K, Malik S. Computation of floating mode delay in combinational circuits: theory and algorithms Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 1913-1923. DOI: 10.1109/43.251155  0.359
1993 Cheng KT, Devadas S, Keutzer K. Delay-Fault Test Generation and Synthesis for Testability Under a Standard Scan Design Methodology Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 1217-1231. DOI: 10.1109/43.238614  0.35
1993 Devadas S, Keutzer K, Malik S. A synthesis-based test generation and compaction algorithm for multifaults Journal of Electronic Testing. 4: 91-104. DOI: 10.1007/Bf00971942  0.327
1992 Devadas S, Keutzer K. Synthesis of robust delay-fault-testable circuits: practice Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 11: 277-300. DOI: 10.1109/43.124416  0.318
1991 Keutzer K, Malik S, Saldanha A. Is redundancy necessary to reduce delay? Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 10: 427-435. DOI: 10.1109/43.75626  0.341
1991 Devadas S, Keutzer K. An automata-theoretic approach to behavioral equivalence Integration. 12: 109-129. DOI: 10.1016/0167-9260(91)90032-G  0.37
1989 Wolf W, Keutzer K, Akella J. Addendum to 'A kernel-finding state assignment algorithm for multi-level logic' Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 8: 925-927. DOI: 10.1109/43.31552  0.352
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