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Loganathan Lingappan, Ph.D. - Publications

Affiliations: 
2006 Princeton University, Princeton, NJ 
Area:
Biological & Biomedical,Computing & Networking,Energy & Environment,High-Performance Computing,Integrated Electronic Systems,Nanotechnologies,Quantum Information,Security
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18 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2015 Tanwir S, Prabhu S, Hsiao M, Lingappan L. Information-theoretic and statistical methods of failure log selection for improved diagnosis Proceedings - International Test Conference. 2015. DOI: 10.1109/TEST.2015.7342381  0.356
2013 Prabhu S, Hsiao MS, Lingappan L, Gangaram V. Test generation for circuits with embedded memories using SMT Proceedings - 2013 18th Ieee European Test Symposium, Ets 2013. DOI: 10.1109/ETS.2013.6569390  0.32
2012 Prabhu S, Hsiao MS, Lingappan L, Gangaram V. A SMT-based diagnostic test generation method for combinational circuits Proceedings of the Ieee Vlsi Test Symposium. 215-220. DOI: 10.1109/VTS.2012.6231105  0.506
2012 Prabhu S, Hsiao MS, Lingappan L, Gangaram V. A novel SMT-based technique for LFSR reseeding Proceedings of the Ieee International Conference On Vlsi Design. 394-399. DOI: 10.1109/VLSID.2012.103  0.463
2011 Krishnamoorthy S, Hsiao MS, Lingappan L. Strategies for scalable symbolic execution-driven test generation for programs Science China Information Sciences. 54: 1797-1812. DOI: 10.1007/S11432-011-4368-7  0.338
2010 Krishnamoorthy S, Hsiao MS, Lingappan L. Tackling the path explosion problem in symbolic execution-driven test generation for programs Proceedings of the Asian Test Symposium. 59-64. DOI: 10.1109/ATS.2010.19  0.32
2009 Lingappan L, Gangaram V, Jha NK, Chakravarty S. Fast enhancement of validation test sets for improving the stuck-at fault coverage of RTL circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 697-708. DOI: 10.1109/TVLSI.2009.2013981  0.508
2007 Lingappan L, Gangaram V, Jha NK, Chakravarty S. Fast enhancement of validation test sets to improve stuck-at fault coverage for RTL circuits Proceedings of the Ieee International Conference On Vlsi Design. 504-509. DOI: 10.1109/VLSID.2007.82  0.508
2007 Lingappan L, Jha NK. Satisfiability-based automatic test program generation and design for testability for microprocessors Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 15: 518-530. DOI: 10.1109/TVLSI.2007.896908  0.567
2007 Gupta P, Jha NK, Lingappan L. A test generation framework for quantum cellular automata circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 15: 24-36. DOI: 10.1109/Tvlsi.2007.891081  0.51
2007 Lingappan L, Jha NK. Efficient design for testability solution based on unsatisfiability for register-transfer level circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1339-1345. DOI: 10.1109/Tcad.2006.888268  0.458
2006 Lingappan L, Jha NK. Improving the performance of automatic sequential test generation by targeting hard-to-test faults Proceedings of the Ieee International Conference On Vlsi Design. 2006: 431-436. DOI: 10.1109/VLSID.2006.104  0.578
2006 Lingappan L, Ravi S, Raghunathan A, Jha NK, Chakradhar ST. Test-volume reduction in systems-on-a-chip using heterogeneous and multilevel compression techniques Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2193-2205. DOI: 10.1109/Tcad.2005.862735  0.342
2006 Lingappan L, Ravi S. Satisfiability-based test generation for nonseparable RTL controller-datapath circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 544-556. DOI: 10.1109/Tcad.2005.853700  0.614
2006 Gupta P, Jha NK, Lingappan L. Test generation for combinational Quantum Cellular Automata (QCA) circuits Proceedings -Design, Automation and Test in Europe, Date. 1.  0.594
2005 Lingappan L, Jha NK. Unsatisfiability based efficient design for testability solution for register-transfer level circuits Proceedings of the Ieee Vlsi Test Symposium. 418-423. DOI: 10.1109/VTS.2005.88  0.565
2005 Lingappan L, Ravi S, Raghunathan A, Jha NK, Chakradhar ST. Heterogeneous and multi-level compression techniques for test volume reduction in systems-on-chip Proceedings of the Ieee International Conference On Vlsi Design. 65-70.  0.72
2003 Lingappan L, Ravi S, Jha NK. Test generation for non-separable RTL controller-datapath circuits using a satisfiability based approach Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 187-193.  0.598
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