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Sebastian Hoyos, Ph.D. - Publications

Affiliations: 
2004 University of Delaware, Newark, DE, United States 
Area:
Electronics and Electrical Engineering
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44 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Tofighi Zavareh A, Hoyos S. Kalman-Based Real-Time Functional Decomposition for the Spectral Calibration in Swept Source Optical Coherence Tomography. Ieee Transactions On Biomedical Circuits and Systems. PMID 31751249 DOI: 10.1109/Tbcas.2019.2953212  0.412
2019 Kiran S, Shafik A, Tabasy EZ, Cai S, Lee K, Hoyos S, Palermo S. Modeling of ADC-Based Serial Link Receivers With Embedded and Digital Equalization Ieee Transactions On Components, Packaging and Manufacturing Technology. 9: 536-548. DOI: 10.1109/Tcpmt.2018.2853080  0.458
2019 Kiran S, Cai S, Luo Y, Hoyos S, Palermo S. A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS Ieee Journal of Solid-State Circuits. 54: 659-671. DOI: 10.1109/Jssc.2018.2878850  0.519
2018 Palermo S, Hoyos S, Cai S, Kiran S, Zhu Y. Analog-to-Digital Converter-Based Serial Links: An Overview Ieee Solid-State Circuits Magazine. 10: 35-47. DOI: 10.1109/Mssc.2018.2844603  0.407
2017 Zhou J, Zavareh AT, Gupta R, Liu L, Wang Z, Sadler BM, Silva-Martinez J, Hoyos S. Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices Ieee Transactions On Circuits and Systems I: Regular Papers. 64: 2495-2507. DOI: 10.1109/Tcsi.2017.2707481  0.475
2017 Cai S, Tabasy EZ, Shafik A, Kiran S, Hoyos S, Palermo S. A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS Ieee Journal of Solid-State Circuits. 52: 2168-2179. DOI: 10.1109/Jssc.2017.2689033  0.45
2017 Cai S, Zhu Y, Kiran S, Hoyos S, Palermo S. Reference switching pre-emphasis-based successive approximation register ADC with enhanced DAC settling Electronics Letters. 53: 1352-1354. DOI: 10.1049/El.2017.0733  0.403
2016 Palermo S, Hoyos S, Shafik A, Tabasy EZ, Cai S, Kiran S, Lee K. CMOS ADC-based receivers for high-speed electrical and optical links Ieee Communications Magazine. 54: 168-175. DOI: 10.1109/Mcom.2016.7588288  0.475
2016 Qian H, Liu Q, Silva-Martinez J, Hoyos S. A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2015.2510026  0.393
2016 Shafik A, Zhian Tabasy E, Cai S, Lee K, Hoyos S, Palermo S. A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization Ieee Journal of Solid-State Circuits. DOI: 10.1109/Jssc.2015.2504555  0.481
2014 Sadler BM, Hoyos S. Towards a Standard Mixed-Signal Parallel Processing Architecture for Miniature and Microrobotics. Journal of Research of the National Institute of Standards and Technology. 119: 529-39. PMID 26601042 DOI: 10.6028/Jres.119.020  0.394
2014 Zhou J, Hoyos S, Sadler B. Asynchronous compressed beamformer for portable diagnostic ultrasound systems. Ieee Transactions On Ultrasonics, Ferroelectrics, and Frequency Control. 61: 1791-801. PMID 25389158 DOI: 10.1109/Tuffc.2014.006384  0.482
2014 Jeon HJ, Silva-Martinez J, Hoyos S. A Process-Variation Resilient Current Mode Logic With Simultaneous Regulations for Time Constant, Voltage Swing, Level Shifting, and DC Gain Using Time-Reference-Based Adaptive Biasing Chain Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2014.2301034  0.315
2014 Tabasy EZ, Shafik A, Lee K, Hoyos S, Palermo S. A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications Ieee Journal of Solid-State Circuits. 49: 2560-2574. DOI: 10.1109/Jssc.2014.2358568  0.503
2013 Tabasy EZ, Shafik A, Huang S, Yang NH, Hoyos S, Palermo S. A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS Ieee Journal of Solid-State Circuits. 48: 1885-1897. DOI: 10.1109/Jssc.2013.2259036  0.452
2012 Pentakota K, Ramirez MA, Hoyos S. Least mean squared background calibration for ofdm multichannel receivers Journal of Circuits, Systems and Computers. 21. DOI: 10.1142/S0218126612500144  0.427
2012 Hoyos S, Tsang CW, Vanderhaegen J, Chiu Y, Aibara Y, Khorramabadi H, Nikolic B. A 15 MHz to 600 MHz, 20 mW, 0.38 mm 2 split-control, fast coarse locking digital DLL in 0.13 μ m CMOS Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 564-568. DOI: 10.1109/Tvlsi.2011.2106170  0.423
2012 Saad R, Aristizabal-Ramirez DL, Hoyos S. Sensitivity Analysis of Continuous-Time $\Delta \Sigma$ ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers Ieee Transactions On Circuits and Systems. 59: 1894-1905. DOI: 10.1109/Tcsi.2012.2185310  0.444
2012 Zhou J, Ramirez M, Palermo S, Hoyos S. Digital-Assisted Asynchronous Compressive Sensing Front-End Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 482-492. DOI: 10.1109/Jetcas.2012.2222218  0.473
2012 Chen X, Sobhy EA, Yu Z, Hoyos S, Silva-Martinez J, Palermo S, Sadler BM. A sub-nyquist rate compressive sensing data acquisition front-end Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 2: 542-551. DOI: 10.1109/Jetcas.2012.2221531  0.449
2012 Yu Z, Zhou J, Ramirez MA, Hoyos S, Sadler BM. The impact of ADC nonlinearity in a mixed-signal compressive sensing system for frequency-domain sparse signals Physical Communication. 5: 196-207. DOI: 10.1016/J.Phycom.2011.10.007  0.409
2011 Sobhy EA, Helmy AA, Hoyos S, Entesari K, Sanchez-Sinencio E. A 2.8-mW Sub-2-dB noise-figure inductorless wideband CMOS LNA employing multiple feedback Ieee Transactions On Microwave Theory and Techniques. 59: 3154-3161. DOI: 10.1109/Tmtt.2011.2169081  0.416
2011 Chen X, Yu Z, Hoyos S, Sadler BM, Silva-Martinez J. Corrections to “A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing” [Mar 11 507-520] Ieee Transactions On Circuits and Systems I-Regular Papers. 58: 2801-2801. DOI: 10.1109/Tcsi.2011.2143130  0.311
2011 Chen X, Yu Z, Hoyos S, Sadler BM, Silva-Martinez J. A sub-nyquist rate sampling receiver exploiting compressive sensing Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 507-520. DOI: 10.1109/Tcsi.2010.2072430  0.506
2011 Hoyos S, Pentakota S, Yu Z, Sobhy Abdel Ghany E, Chen X, Saad R, Palermo S, Silva-Martinez J. Clock-jitter-tolerant wideband receivers: An optimized multichannel filter-bank approach Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 253-263. DOI: 10.1109/Tcsi.2010.2072090  0.527
2011 Sobhy EA, Pentakota S, Yu Z, Hoyos S. Analytical framework and bandwidth optimisation of orthogonal frequency division multiplexing low-order multi-channel filter-bank receivers for achieving sampling clock-jitter robustness Iet Circuits Devices & Systems. 5: 360-364. DOI: 10.1049/Iet-Cds.2010.0383  0.509
2011 Saad R, Hoyos S. Feedforward spectral shaping technique for clock-jitter induced errors in digital-to-analogue converters Electronics Letters. 47: 171-172. DOI: 10.1049/El.2010.3374  0.393
2010 Yu Z, Chen X, Hoyos S, Sadler BM, Gong J, Qian C. Mixed-Signal Parallel Compressive Spectrum Sensing for Cognitive Radios International Journal of Digital Multimedia Broadcasting. 2010: 1-10. DOI: 10.1155/2010/730509  0.427
2010 Kim J, Hoyos S, Silva-Martinez J. Wideband common-gate CMOS LNA employing dual negative feedback with simultaneous noise, gain, and bandwidth optimization Ieee Transactions On Microwave Theory and Techniques. 58: 2340-2351. DOI: 10.1109/Tmtt.2010.2057790  0.432
2010 Sobhy EA, Hoyos S. A Multiphase Multipath Technique With Digital Phase Shifters for Harmonic Distortion Cancellation Ieee Transactions On Circuits and Systems Ii-Express Briefs. 57: 921-925. DOI: 10.1109/Tcsii.2010.2083090  0.382
2010 Lu CY, Silva-Rivas JF, Kode P, Silva-Martinez J, Hoyos S. A sixth-order 200 MHz IF bandpass sigma-delta modulator with over 68 dB SNDR in 10 MHz bandwidth Ieee Journal of Solid-State Circuits. 45: 1122-1136. DOI: 10.1109/Jssc.2010.2048505  0.466
2010 Sobhy E, Hoyos S, Sánchez-Sinencio E. High-PSRR low-power single supply OTA Electronics Letters. 46: 337. DOI: 10.1049/El.2010.3455  0.388
2010 Saad R, Hoyos S. Sensitivity of single-bit continuous-time ΔΕ analogue-to-digital converters to out-of-band blockers Electronics Letters. 46: 826-828. DOI: 10.1049/El.2010.1164  0.476
2010 Raviprakash K, Saad R, Hoyos S. Reduced area discrete-time down-sampling filter embedded with windowed integration samplers Electronics Letters. 46: 828-830. DOI: 10.1049/El.2010.1038  0.438
2009 Raviprakash K, Kulkarni M, Chen X, Hoyos S, Sadler BM. A Discrete-Time Downsampling FIR Filter for Windowed Integration Samplers International Journal of Microwave Science and Technology. 2009: 1-10. DOI: 10.1155/2009/758783  0.428
2008 Prakasam PK, Kulkarni M, Chen X, Yu Z, Hoyos S, Silva-Martinez J, Sánchez-Sinencio E. Applications of multipath transform-domain charge-sampling wide-band receivers Ieee Transactions On Circuits and Systems Ii: Express Briefs. 55: 309-313. DOI: 10.1109/Tcsii.2008.919480  0.44
2007 Hoyos S, Sadler BM. UWB mixed-signal transform-domain direct-sequence receiver Ieee Transactions On Wireless Communications. 6: 3038-3046. DOI: 10.1109/Twc.2007.051069  0.462
2006 Hoyos S, Sadler B, Arce G. Broadband multicarrier communication receiver based on analog to digital conversion in the frequency domain Ieee Transactions On Wireless Communications. 5: 652-661. DOI: 10.1109/Twc.2006.1611095  0.605
2006 Hoyos S, Sadler BM. Frequency-domain implementation of the transmitted-reference ultra-wideband receiver Ieee Transactions On Microwave Theory and Techniques. 54: 1745-1753. DOI: 10.1109/Tmtt.2006.872037  0.469
2005 Hoyos S, Sadler B, Arce G. Monobit digital receivers for ultrawideband communications Ieee Transactions On Wireless Communications. 4: 1337-1344. DOI: 10.1109/Twc.2005.850270  0.648
2005 Hoyos S, Sadler BM. Ultra-wideband analog-to-digital conversion via signal expansion Ieee Transactions On Vehicular Technology. 54: 1609-1622. DOI: 10.1109/Tvt.2005.856195  0.459
2005 Hoyos S, Bacca J, Arce G. Spectral design of weighted median Filters:A general iterative approach Ieee Transactions On Signal Processing. 53: 1045-1056. DOI: 10.1109/Tsp.2004.842206  0.573
2004 Hoyos S, Li Y, Bacca J, Arce G. Weighted Median Filters Admitting Complex-Valued Weights and Their Optimization Ieee Transactions On Signal Processing. 52: 2776-2787. DOI: 10.1109/Tsp.2004.834342  0.616
2004 Hoyos S, Garcia JA, Arce GR. Mixed-signal equalization architectures for printed circuit board channels Ieee Transactions On Circuits and Systems. 51: 264-274. DOI: 10.1109/Tcsi.2003.822552  0.475
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