Sabyasachi Das, Ph.D. - Publications
Affiliations: | 2007 | Electrical Engineering | University of Colorado, Boulder, Boulder, CO, United States |
Area:
Electronics and Electrical EngineeringYear | Citation | Score | |||
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2008 | Das S, Khatri SP. Resource sharing among mutually exclusive sum-of-product blocks for area reduction Acm Transactions On Design Automation of Electronic Systems. 13. DOI: 10.1145/1367045.1367060 | 0.538 | |||
2008 | Das S, Khatri SP. A novel hybrid parallel-prefix adder architecture with efficient timing-area characteristic Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 326-331. DOI: 10.1109/Tvlsi.2007.915507 | 0.532 | |||
2008 | Das S, Khatri SP. A timing-driven approach to synthesize fast barrel shifters Ieee Transactions On Circuits and Systems Ii: Express Briefs. 55: 31-35. DOI: 10.1109/Tcsii.2007.908951 | 0.512 | |||
2002 | Das S, Khatri SP. An efficient and regular routing methodology for datapath designs using net regularity extraction Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 93-101. DOI: 10.1109/43.974141 | 0.5 | |||
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