| Year |
Citation |
Score |
| 2012 |
Pyla HK, Varadarajan S. Transparent runtime deadlock elimination Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 477. DOI: 10.1145/2370816.2370905 |
1 |
|
| 2012 |
Duggirala V, Varadarajan S. Open network emulator: A parallel direct code execution network simulator Proceedings - 2012 Acm/Ieee/Scs 26th Workshop On Principles of Advanced and Distributed Simulation, Pads 2012. 101-110. DOI: 10.1109/PADS.2012.29 |
1 |
|
| 2012 |
Varadarajan S. Message from the general chair Proceedings of the 2012 Ieee 20th International Symposium On Modeling, Analysis and Simulation of Computer and Telecommunication Systems, Mascots 2012. xi. DOI: 10.1109/MASCOTS.2012.5 |
1 |
|
| 2010 |
Pyla HK, Varadarajan S. Avoiding deadlock avoidance Parallel Architectures and Compilation Techniques - Conference Proceedings, Pact. 75-85. DOI: 10.1145/1854273.1854288 |
1 |
|
| 2008 |
Varadarajan S. Message from chairman, INCEMIC-2008 Proceedings of the International Conference On Electromagnetic Interference and Compatibility. |
1 |
|
| 2006 |
Ruscio JF, Heffner MA, Varadarajan S. DejaVu: Transparent user-level checkpointing, migration and recovery for distributed systems Proceedings of the 2006 Acm/Ieee Conference On Supercomputing, Sc'06. DOI: 10.1145/1188455.1188619 |
1 |
|
| 2005 |
Mukherjee J, Varadarajan S. Develop once deploy anywhere: Achieving adaptivity with a runtime linker/loader framework Acm International Conference Proceeding Series. 116. DOI: 10.1145/1101516.1101517 |
1 |
|
| 2005 |
Varadarajan S, Ramakrishnan N. Novel runtime systems support for adaptive compositional modeling in PSEs Future Generation Computer Systems. 21: 878-895. DOI: 10.1016/j.future.2003.12.020 |
1 |
|
| 2005 |
Mukherjee J, Varadarajan S. Weaves: A framework for reconfigurable programming International Journal of Parallel Programming. 33: 279-305. DOI: 10.1007/s10766-005-3591-5 |
1 |
|
| 2004 |
Varadarajan S. The weaves runtime framework Proceedings - International Parallel and Distributed Processing Symposium, Ipdps 2004 (Abstracts and Cd-Rom). 18: 2751-2758. |
1 |
|
| 2004 |
Varadarajan S. System X: Building the Virginia tech supercomputer Proceedings - International Conference On Computer Communications and Networks, Icccn. 2. |
1 |
|
| 2001 |
Varadarajan S. Experiences with EtheReal: A fault-tolerant real-time Ethernet switch Ieee International Conference On Emerging Technologies and Factory Automation, Etfa. 1: 183-194. |
1 |
|
| 1995 |
Agrawal A, Raju A, Varadarajan S, Bayoumi MA. Scalable shared buffer ATM switch architecture Proceedings of the Ieee Great Lakes Symposium On Vlsi. 256-261. |
1 |
|
| 1993 |
Varadarajan S, Ramakrishna NA, Bayoumi MA. Stochastic evolution based register allocation using multiport memories Midwest Symposium On Circuits and Systems. 1: 472-475. |
1 |
|
| 1993 |
Varadarajan S, Srinivas PV, Kalapatapu V, Bayoumi MA. Architecture for rate-distortion optimized motion estimation Midwest Symposium On Circuits and Systems. 2: 954-957. |
1 |
|
| Show low-probability matches. |