Joseph R. Cavallaro - Publications

Affiliations: 
Rice University, Houston, TX 
Area:
Electronics and Electrical Engineering, Computer Science

138 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Jeon C, Li K, Cavallaro JR, Studer C. Decentralized Equalization With Feedforward Architectures for Massive MU-MIMO Ieee Transactions On Signal Processing. 67: 4418-4432. DOI: 10.1109/Tsp.2019.2928947  0.447
2018 Pareschi F, Lustenberger F, Johansson H, Cavallaro J. Guest Editorial Special Issue on the 2017 IEEE International Symposium on Circuits and Systems (ISCAS 2017) Ieee Transactions On Circuits and Systems I-Regular Papers. 65: 857-858. DOI: 10.1109/Tcsi.2017.2788178  0.317
2018 Yuan B, Goel M, Wolf MC, Rajagopal S, Cavallaro JR. Introduction to the Special Issue on Signal Processing Systems Journal of Signal Processing Systems. 90: 1383-1385. DOI: 10.1007/S11265-018-1391-6  0.513
2018 Wu M, Yin B, Li K, Dick C, Cavallaro JR, Studer C. Implicit vs. Explicit Approximate Matrix Inversion for Wideband Massive MU-MIMO Data Detection Journal of Signal Processing Systems. 90: 1311-1328. DOI: 10.1007/S11265-017-1313-Z  0.408
2018 Tarver C, Abdelaziz M, Anttila L, Valkama M, Cavallaro JR. Low-complexity, Multi Sub-band Digital Predistortion: Novel Algorithms and SDR Verification Journal of Signal Processing Systems. 90: 1495-1505. DOI: 10.1007/S11265-017-1303-1  0.303
2017 Vosoughi A, Cavallaro JR, Marshall A. A Context-Aware Trust Framework for Resilient Distributed Cooperative Spectrum Sensing in Dynamic Settings Ieee Transactions On Vehicular Technology. 66: 9177-9191. DOI: 10.1109/Tvt.2017.2716361  0.306
2017 Li K, Sharan RR, Chen Y, Goldstein T, Cavallaro JR, Studer C. Decentralized Baseband Processing for Massive MU-MIMO Systems Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 7: 491-507. DOI: 10.1109/Jetcas.2017.2775151  0.453
2017 Li K, Ghazi A, Tarver C, Boutellier J, Abdelaziz M, Anttila L, Juntti MJ, Valkama M, Cavallaro JR. Parallel Digital Predistortion Design on Mobile GPU and Embedded Multicore CPU for Mobile Transmitters Journal of Signal Processing Systems. 89: 417-430. DOI: 10.1007/S11265-017-1233-Y  0.429
2016 Abdelaziz M, Anttila L, Tarver C, Li K, Cavallaro JR, Valkama M. Low-Complexity Subband Digital Predistortion for Spurious Emission Suppression in Noncontiguous Spectrum Access Ieee Transactions On Microwave Theory and Techniques. 64: 3501-3517. DOI: 10.1109/Tmtt.2016.2602208  0.365
2016 Makki A, Siddig A, Saad M, Cavallaro JR, Bleakley CJ. Indoor Localization Using 802.11 Time Differences of Arrival Ieee Transactions On Instrumentation and Measurement. 65: 614-623. DOI: 10.1109/Tim.2015.2506239  0.339
2016 Wu M, Dick C, Cavallaro JR, Studer C. High-Throughput Data Detection for Massive MU-MIMO-OFDM Using Coordinate Descent Ieee Transactions On Circuits and Systems I-Regular Papers. 63: 2357-2367. DOI: 10.1109/Tcsi.2016.2611645  0.478
2016 Vosoughi A, Cavallaro JR, Marshall A. Trust-Aware Consensus-Inspired Distributed Cooperative Spectrum Sensing for Cognitive Radio Ad Hoc Networks Ieee Transactions On Cognitive Communications and Networking. 2: 24-37. DOI: 10.1109/Tccn.2016.2584080  0.319
2016 Li K, Ghazi A, Boutellier J, Abdelaziz M, Anttila L, Juntti M, Valkama M, Cavallaro JR. Mobile GPU accelerated digital predistortion on a software-defined mobile transmitter 2015 Ieee Global Conference On Signal and Information Processing, Globalsip 2015. 756-760. DOI: 10.1109/GlobalSIP.2015.7418298  0.35
2016 Mu J, Vosoughi A, Andrade J, Balatsoukas-Stimming A, Karakonstantis G, Burg A, Falcao G, Silva V, Cavallaro JR. The impact of faulty memory bit cells on the decoding of spatially-coupled LDPC codes Conference Record - Asilomar Conference On Signals, Systems and Computers. 2016: 1627-1631. DOI: 10.1109/ACSSC.2015.7421423  0.334
2015 Yin B, Wu M, Cavallaro JR, Studer C. VLSI design of large-scale soft-output MIMO detection using conjugate gradients Proceedings - Ieee International Symposium On Circuits and Systems. 2015: 1498-1501. DOI: 10.1109/ISCAS.2015.7168929  0.339
2015 Li K, Yin B, Wu M, Cavallaro JR, Studer C. Accelerating massive MIMO uplink detection on GPU for SDR systems 2015 Ieee Dallas Circuits and Systems Conference: Enabling Technologies For a Connected World, Dcas 2015. DOI: 10.1109/DCAS.2015.7356600  0.355
2015 Li K, Wu M, Wang G, Cavallaro JR. A high performance GPU-based software-defined basestation Conference Record - Asilomar Conference On Signals, Systems and Computers. 2015: 2060-2064. DOI: 10.1109/ACSSC.2014.7094835  0.325
2015 Wu M, Yin B, Miller E, Dick C, Cavallaro JR. High-throughput DOCSIS upstream QC-LDPC decoder Conference Record - Asilomar Conference On Signals, Systems and Computers. 2015: 537-541. DOI: 10.1109/ACSSC.2014.7094503  0.392
2015 Makki A, Siddig A, Saad MM, Bleakley CJ, Cavallaro JR. High-resolution time of arrival estimation for OFDM-based transceivers Electronics Letters. 51: 294-296. DOI: 10.1049/El.2014.3677  0.331
2014 Wang G, Shen H, Sun Y, Cavallaro JR, Vosoughi A, Guo Y. Parallel interleaver design for a high throughput HSPA+/LTE multi-standard turbo decoder Ieee Transactions On Circuits and Systems I: Regular Papers. 61: 1376-1389. DOI: 10.1109/Tcsi.2014.2309810  0.664
2014 Wu M, Yin B, Wang G, Dick C, Cavallaro JR, Studer C. Large-scale MIMO detection for 3GPP LTE: Algorithms and FPGA implementations Ieee Journal On Selected Topics in Signal Processing. 8: 916-929. DOI: 10.1109/Jstsp.2014.2313021  0.433
2014 Rister B, Jääskelainen P, Silvén O, Hannuksela J, Cavallaro JR. Parallel programming of a symmetric transport-triggered architecture with applications in flexible LDPC encoding Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 8380-8384. DOI: 10.1109/ICASSP.2014.6855236  0.323
2014 Wu M, Yin B, Wang G, Studer C, Cavallaro JR. GPU acceleration of a configurable N-way MIMO detector for wireless systems Journal of Signal Processing Systems. 76: 95-108. DOI: 10.1007/s11265-014-0877-0  0.371
2014 Wu M, Dick C, Cavallaro JR, Studer C. Iterative detection and decoding in 3GPP LTE-based massive MIMO systems European Signal Processing Conference. 96-100.  0.332
2013 Sun Y, Cavallaro JR. VLSI architecture for layered decoding of QC-LDPC codes with high circulant weight Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 1960-1964. DOI: 10.1109/Tvlsi.2012.2220388  0.461
2013 Wu M, Yin B, Vosoughi A, Studer C, Cavallaro JR, Dick C. Approximate matrix inversion for high-throughput data detection in the large-scale MIMO uplink Proceedings - Ieee International Symposium On Circuits and Systems. 2155-2158. DOI: 10.1109/ISCAS.2013.6572301  0.305
2013 Wang G, Vosoughi A, Shen H, Cavallaro JR, Guo Y. Parallel interleaver architecture with new scheduling scheme for high throughput configurable turbo decoder Proceedings - Ieee International Symposium On Circuits and Systems. 1340-1343. DOI: 10.1109/ISCAS.2013.6572102  0.384
2013 Yin B, Wu M, Studer C, Cavallaro JR, Dick C. Implementation trade-offs for linear detection in large-scale MIMO systems Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 2679-2683. DOI: 10.1109/ICASSP.2013.6638142  0.33
2013 Wang G, Wu M, Yin B, Cavallaro JR. High throughput low latency LDPC decoding on GPU for SDR systems 2013 Ieee Global Conference On Signal and Information Processing, Globalsip 2013 - Proceedings. 1258-1261. DOI: 10.1109/GlobalSIP.2013.6737137  0.404
2013 Wang G, Rister B, Cavallaro JR. Workload analysis and efficient OpenCL-based implementation of SIFT algorithm on a smartphone 2013 Ieee Global Conference On Signal and Information Processing, Globalsip 2013 - Proceedings. 759-762. DOI: 10.1109/GlobalSIP.2013.6737002  0.318
2013 Vosoughi A, Wang G, Shen H, Cavallaro JR, Guo Y. Highly scalable on-the-fly interleaved address generation for UMTS/HSPA+ parallel turbo decoder Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 356-362. DOI: 10.1109/ASAP.2013.6567601  0.39
2013 Wu M, Wang G, Yin B, Studer C, Cavallaro JR. HSPA;/LTE-A turbo decoder on GPU and multicore CPU Conference Record - Asilomar Conference On Signals, Systems and Computers. 824-828. DOI: 10.1109/ACSSC.2013.6810402  0.425
2012 Sun Y, Cavallaro JR. High-throughput soft-output MIMO detector based on path-preserving trellis-search algorithm Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 1235-1247. DOI: 10.1109/Tvlsi.2011.2147811  0.432
2012 Radosavljevic P, Kim KJ, Shen H, Cavallaro JR. Parallel searching-based sphere detector for MIMO downlink OFDM systems Ieee Transactions On Signal Processing. 60: 3240-3252. DOI: 10.1109/Tsp.2012.2190595  0.804
2012 Sun Y, Cavallaro JR. Trellis-search based soft-input soft-output MIMO detector: Algorithm and VLSI architecture Ieee Transactions On Signal Processing. 60: 2617-2627. DOI: 10.1109/Tsp.2012.2187646  0.424
2012 Vosoughi A, Wu M, Cavallaro JR. Baseband signal compression in wireless base stations Globecom - Ieee Global Telecommunications Conference. 4505-4511. DOI: 10.1109/GLOCOM.2012.6503828  0.32
2012 Wang G, Shen H, Yin B, Wu M, Sun Y, Cavallaro JR. Parallel nonbinary LDPC decoding on GPU Conference Record - Asilomar Conference On Signals, Systems and Computers. 1277-1281. DOI: 10.1109/ACSSC.2012.6489229  0.443
2012 Yin B, Wu M, Wang G, Cavallaro JR. Low complexity opportunistic decoder for network coding Conference Record - Asilomar Conference On Signals, Systems and Computers. 1097-1101. DOI: 10.1109/ACSSC.2012.6489189  0.336
2012 Yin B, Cavallaro JR. LTE uplink MIMO receiver with low complexity interference cancellation Analog Integrated Circuits and Signal Processing. 73: 443-450. DOI: 10.1007/S10470-012-9945-1  0.378
2012 Wu M, Dick C, Sun Y, Cavallaro JR. Low complexity scalable MIMO sphere detection through antenna detection reordering Analog Integrated Circuits and Signal Processing. 73: 463-472. DOI: 10.1007/S10470-012-9894-8  0.384
2011 Myllyla M, Cavallaro JR, Juntti M. Architecture design and implementation of the metric first list sphere detector algorithm Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 895-899. DOI: 10.1109/Tvlsi.2010.2041800  0.469
2011 Amiri K, Wu M, Cavallaro JR, Lilleberg J. Cooperative partial detection using MIMO relays Ieee Transactions On Signal Processing. 59: 5039-5049. DOI: 10.1109/Tsp.2011.2157498  0.395
2011 Wang G, Wu M, Sun Y, Cavallaro JR. A massively parallel implementation of QC-LDPC decoder on GPU Proceedings of the 2011 Ieee 9th Symposium On Application Specific Processors, Sasp 2011. 82-85. DOI: 10.1109/SASP.2011.5941084  0.354
2011 Sun Y, Wang G, Cavallaro JR. Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes Proceedings - Ieee International Symposium On Circuits and Systems. 1776-1779. DOI: 10.1109/ISCAS.2011.5937928  0.316
2011 Wang G, Sun Y, Cavallaro JR, Guo Y. High-throughput contention-Free concurrent interleaver architecture for multi-standard turbo decoder Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 113-121. DOI: 10.1109/ASAP.2011.6043259  0.398
2011 Wang G, Wu M, Sun Y, Cavallaro JR. GPU accelerated scalable parallel decoding of LDPC codes Conference Record - Asilomar Conference On Signals, Systems and Computers. 2053-2057. DOI: 10.1109/ACSSC.2011.6190388  0.446
2011 Sun Y, Cavallaro JR. Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder Integration, the Vlsi Journal. 44: 305-315. DOI: 10.1016/J.Vlsi.2010.07.001  0.499
2011 Wu M, Sun Y, Wang G, Cavallaro JR. Implementation of a high throughput 3GPP turbo decoder on GPU Journal of Signal Processing Systems. 65: 171-183. DOI: 10.1007/s11265-011-0617-7  0.416
2011 Wu M, Sun Y, Gupta S, Cavallaro JR. Implementation of a high throughput soft MIMO detector on GPU Journal of Signal Processing Systems. 64: 123-136. DOI: 10.1007/s11265-010-0523-4  0.368
2011 Sun Y, Cavallaro JR. A flexible LDPC/turbo decoder architecture Journal of Signal Processing Systems. 64: 1-16. DOI: 10.1007/s11265-010-0477-6  0.428
2011 Amiri K, Cavallaro JR, Dick C, Rao RM. A high throughput configurable SDR detector for multi-user MIMO wireless systems Journal of Signal Processing Systems. 62: 233-245. DOI: 10.1007/s11265-009-0360-5  0.312
2010 Ketonen J, Juntti M, Cavallaro JR. Performance-complexity comparison of receivers for a LTE MIMOOFDM system Ieee Transactions On Signal Processing. 58: 3360-3372. DOI: 10.1109/Tsp.2010.2044290  0.444
2010 Wu M, Sun Y, Cavallaro JR. Implementation of a 3GPP LTE turbo decoder accelerator on GPU Ieee Workshop On Signal Processing Systems, Sips: Design and Implementation. 192-197. DOI: 10.1109/SIPS.2010.5624788  0.371
2010 Myllylä M, Juntti M, Cavallaro JR. Implementation aspects of list sphere decoder algorithms for MIMO-OFDM systems Signal Processing. 90: 2863-2876. DOI: 10.1016/J.Sigpro.2010.04.014  0.392
2010 Sun Y, Amiri K, Cavallaro JR, Ly T. Designing scalable wireless application-specific accelerators using PICO high level synthesis Designcon 2010. 1: 59-81.  0.326
2009 Sun Y, Cavallaro JR. High throughput VLSI architecture for soft-output MIMO detection based on a greedy graph algorithm Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 445-450. DOI: 10.1145/1531542.1531645  0.366
2009 Sun Y, Cavallaro JR, Ly T. Scalable and low power LDPC decoder design using high level algorithmic synthesis Proceedings - Ieee International Soc Conference, Socc 2009. 267-270. DOI: 10.1109/SOCCON.2009.5398044  0.341
2009 Wu M, Gupta S, Sun Y, Cavallaro JR. A GPU implementation of a real-time MIMO detector Ieee Workshop On Signal Processing Systems, Sips: Design and Implementation. 303-308. DOI: 10.1109/SIPS.2009.5336271  0.332
2009 Radosavljevic P, Guo Y, Cavallaro JR. Probabilistically bounded soft sphere detection for MIMO-OFDM receivers: Algorithm and system architecture Ieee Journal On Selected Areas in Communications. 27: 1318-1330. DOI: 10.1109/Jsac.2009.091002  0.815
2009 Amiri K, Cavallaro JR. Partial detection for multiple antenna cooperation Proceedings - 43rd Annual Conference On Information Sciences and Systems, Ciss 2009. 669-674. DOI: 10.1109/CISS.2009.5054802  0.3
2009 Brogioli MC, Cavallaro JR. Compiler driven architecture design space exploration for DSP workloads: A study in software programmability versus hardware acceleration Conference Record - Asilomar Conference On Signals, Systems and Computers. 221-225. DOI: 10.1109/ACSSC.2009.5470122  0.805
2009 Wang G, Yin B, Amiri K, Sun Y, Wu M, Cavallaro JR. FPGA prototyping of a high data rate LTE uplink baseband receiver Conference Record - Asilomar Conference On Signals, Systems and Computers. 248-252. DOI: 10.1109/ACSSC.2009.5470112  0.346
2009 Ketonen J, Juntti M, Cavallaro JR. Receiver implementation for MIMO-OFDM with AMC and precoding Conference Record - Asilomar Conference On Signals, Systems and Computers. 1268-1272. DOI: 10.1109/ACSSC.2009.5469950  0.354
2009 Wu M, Sun Y, Cavallaro JR. Reconfigurable real-time MIMO detector on GPU Conference Record - Asilomar Conference On Signals, Systems and Computers. 690-694. DOI: 10.1109/ACSSC.2009.5469936  0.359
2009 Myllylä M, Juntti M, Cavallaro JR. Architecture design and implementation of the increasing radius - List sphere detector algorithm Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 553-556.  0.332
2008 Chandrasekhar V, Livingston F, Cavallaro JR. Reducing dynamic power consumption in next generation DS-CDMA mobile communication receivers International Journal of Embedded Systems. 3: 128-140. DOI: 10.1504/Ijes.2008.020294  0.401
2008 Sun Y, Cavallaro JR. A low-power 1-Gbps reconfigurable LDPC decoder design for multiple 4G wireless standards 2008 Ieee International Soc Conference, Socc. 367-370. DOI: 10.1109/SOCC.2008.4641546  0.333
2008 Sun Y, Cavallaro JR. Unified decoder architecture for LDPC/turbo codes Ieee Workshop On Signal Processing Systems, Sips: Design and Implementation. 13-18. DOI: 10.1109/SIPS.2008.4671730  0.388
2008 Radosavljevic P, Cavallaro JR. Design of block-structured LDPC codes for iterative receivers with soft sphere detection Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 2693-2696. DOI: 10.1109/ICASSP.2008.4518204  0.801
2008 Radosavljevic P, Kim KJ, Cavallaro JR. QRD-QLD searching based sphere detection for emerging MIMO downlink OFDM receivers Globecom - Ieee Global Telecommunications Conference. 4212-4216. DOI: 10.1109/GLOCOM.2008.ECP.808  0.78
2008 Sun Y, Zhu Y, Goel M, Cavallaro JR. Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 209-214. DOI: 10.1109/ASAP.2008.4580180  0.396
2008 Sun Y, Cavallaro JR. A new MIMO detector architecture based on a forward-backward trellis algorithm Conference Record - Asilomar Conference On Signals, Systems and Computers. 1892-1896. DOI: 10.1109/ACSSC.2008.5074757  0.375
2008 Myllylä M, Juntti M, Cavallaro JR. Implementation and complexity analysis of list sphere detector for mimo-ofdm systems Conference Record - Asilomar Conference On Signals, Systems and Computers. 1852-1856. DOI: 10.1109/ACSSC.2008.5074749  0.34
2008 Dick C, Amiri K, Cavallaro JR, Rao R. Design and architecture of spatial multiplexing MIMO decoders for FPGAs Conference Record - Asilomar Conference On Signals, Systems and Computers. 160-164. DOI: 10.1109/ACSSC.2008.5074383  0.391
2008 Karkooti M, Radosavljevic P, Cavallaro JR. Configurable LDPC decoder architectures for regular and irregular codes Journal of Signal Processing Systems. 53: 73-88. DOI: 10.1007/s11265-008-0221-7  0.807
2008 Karkooti M, Cavallaro JR. Cooperative communications using scalable, medium block-length LDPC codes Ieee Wireless Communications and Networking Conference, Wcnc. 88-93.  0.803
2007 Guo Y, Zhang J, McCain D, Cavallaro JR. Structured parallel architecture for displacement MIMO Kalman equalizer in CDMA systems Ieee Transactions On Circuits and Systems Ii: Express Briefs. 54: 122-126. DOI: 10.1109/Tcsii.2006.885075  0.575
2007 Guo Y, Cavallaro JR. Scalable architecture of MIMO multi-carrier CDMA system on programmable logic Conference Record - Asilomar Conference On Signals, Systems and Computers. 1976-1980. DOI: 10.1109/ACSSC.2007.4487582  0.343
2007 Amiri K, Radosavljevic P, Cavallaro JR. Architecture and algorithm for a stochastic soft-output MIMO detector Conference Record - Asilomar Conference On Signals, Systems and Computers. 1034-1038. DOI: 10.1109/ACSSC.2007.4487378  0.785
2007 Karkooti M, Cavallaro JR. Distributed decoding in cooperative communications Conference Record - Asilomar Conference On Signals, Systems and Computers. 824-828. DOI: 10.1109/ACSSC.2007.4487332  0.797
2007 Sun Y, Karkooti M, Cavallaro JR. VLSI decoder architecture for high throughput, variable block-size and multi-rate LDPC codes Proceedings - Ieee International Symposium On Circuits and Systems. 2104-2107.  0.826
2006 Guo Y, McCain D, Cavallaro JR, Takach A. Rapid industrial prototyping and SoC design of 3G/4G wireless systems using an HLS methodology Eurasip Journal On Embedded Systems. 2006: 1-25. DOI: 10.1155/Es/2006/14952  0.618
2006 Guo Y, Zhang J, McCain D, Cavallaro JR. An efficient circulant MIMO equalizer for CDMA downlink: Algorithm and VLSI architecture Eurasip Journal On Applied Signal Processing. 2006. DOI: 10.1155/Asp/2006/57134  0.611
2006 Rajagopal S, Cavallaro JR. Truncated online arithmetic with applications to communication systems Ieee Transactions On Computers. 55: 1240-1252. DOI: 10.1109/Tc.2006.168  0.628
2006 Radosavljevic P, De Baynast A, Karkooti M, Cavallaro JR. Multi-rate high-throughput LDPC decoder: Tradeoff analysis between decoding throughput and area Ieee International Symposium On Personal, Indoor and Mobile Radio Communications, Pimrc. DOI: 10.1109/PIMRC.2006.254392  0.811
2006 Sun Y, Karkooti M, Cavallaro JR. High throughput, parallel, scalable LDPC encoder/decoder architecture for OFDM systems 2006 Ieee Dallas/Cas Workshop Ondesign, Applications, Integration and Software, Dcas-06. 39-42. DOI: 10.1109/DCAS.2006.321028  0.841
2006 Karkooti M, Radosavljevic P, Cavallaro JR. Configurable, high throughput, irregular LDPC decoder architecture: Tradeoff analysis and implementation Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 360-367. DOI: 10.1109/ASAP.2006.23  0.813
2006 Amiri K, Cavallaro JR. FPGA implementation of dynamic threshold sphere detection for MIMO systems Conference Record - Asilomar Conference On Signals, Systems and Computers. 94-98. DOI: 10.1109/ACSSC.2006.356591  0.351
2006 Brogioli M, Radosavljevic P, Cavallaro JR. A general hardware/software co-design methodology for embedded signal processing and multimedia workloads Conference Record - Asilomar Conference On Signals, Systems and Computers. 1486-1490. DOI: 10.1109/ACSSC.2006.355005  0.789
2006 Radosavljevic P, Cavallaro JR. Soft sphere detection with bounded search for high-throughput MIMO receivers Conference Record - Asilomar Conference On Signals, Systems and Computers. 1175-1179. DOI: 10.1109/ACSSC.2006.354940  0.778
2006 Myllylä M, Juntti M, Limingoja M, Byman A, Cavallaro JR. Performance evaluation of two LMMSE detectors in a MIMO-OFDM hardware testbed Conference Record - Asilomar Conference On Signals, Systems and Computers. 1161-1165. DOI: 10.1109/ACSSC.2006.354937  0.322
2006 Guo Y, Cavallaro JR. A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 44: 195-217. DOI: 10.1007/s11265-006-8535-9  0.342
2006 Demestichas P, Vivier G, Cavallaro JR. Special issue on reconfigurable radio technologies in support of ubiquitous seamless computing Multibody System Dynamics. 16: 775-777. DOI: 10.1007/S11036-006-0048-Z  0.313
2006 Radosavljevic P, De Baynast A, Karkooti M, Cavallaro JR. High-throughput multi-rate LDPC decoder based on architecture-oriented parity check matrices European Signal Processing Conference 0.811
2005 Guo Y, McCain D, Cavallaro JR. Hermitian optimization and scalable VLSI architecture for circulant approximated MIMO equalizer in CDMA downlink Ieee Vehicular Technology Conference. 4: 2096-2101. DOI: 10.1109/VETECF.2005.1558489  0.306
2005 Das S, Erkip E, Cavallaro JR, Aazhang B. Low-complexity iterative multiuser detection and decoding for real-time applications Ieee Transactions On Wireless Communications. 4: 1455-1459. DOI: 10.1109/Twc.2005.850314  0.65
2005 Leuschen ML, Walker ID, Cavallaro JR. Fault residual generation via nonlinear analytical redundancy Ieee Transactions On Control Systems Technology. 13: 452-458. DOI: 10.1109/Tcst.2004.839577  0.757
2005 Guo Y, McCain D, Cavallaro JR. FFT-accelerated iterative MIMO chip equalizer architecture for CDMA downlink Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. DOI: 10.1109/ICASSP.2005.1415882  0.35
2005 Guo Y, Zhang J, McCain D, Cavallaro JR. Displacement MIMO Kalman equalizer for CDMA downlink in fast fading channels Globecom - Ieee Global Telecommunications Conference. 4: 2281-2286. DOI: 10.1109/GLOCOM.2005.1578070  0.306
2005 Karkooti M, Cavallaro JR, Dick C. FPGA implementation of matrix inversion using QRD-RLS algorithm Conference Record - Asilomar Conference On Signals, Systems and Computers. 2005: 1625-1629.  0.798
2005 Radosavljevic P, De Baynast A, Cavallaro JR. Optimized message passing schedules for LDPC decoding Conference Record - Asilomar Conference On Signals, Systems and Computers. 2005: 591-595.  0.798
2005 De Baynast A, Radosavljevic P, Cavallaro JR, Sabharwal A. Turbo-schedule for LDPC decoding 43rd Annual Allerton Conference On Communication, Control and Computing 2005. 4: 1805-1814.  0.801
2004 Rajagopal S, Cavallaro JR, Rixner S. Design space exploration for real-time embedded stream processors Ieee Micro. 24: 54-66. DOI: 10.1109/Mm.2004.25  0.562
2004 Karkooti M, Cavallaro JR. Semi-parallel reconfigurable architectures for real-time LDPC decoding International Conference On Information Technology: Coding Computing, Itcc. 1: 579-585. DOI: 10.1109/ITCC.2004.1286526  0.843
2004 Radosavljevic P, Cavallaro JR, De Baynast A. ASIP architecture implementation of channel equalization algorithms for MIMO systems in WCDMA downlink Ieee Vehicular Technology Conference. 60: 1735-1739.  0.804
2004 Guo Y, McCain D, Cavallaro JR. Low complexity system-on-chip architectures of parallel-residue- compensation in CDMA systems Proceedings - Ieee International Symposium On Circuits and Systems. 4.  0.332
2004 De Baynast A, Radosavljevic P, Cavallaro JR. Chip-level LMMSE equalization for downlink MIMO CDMA in fast fading environments Globecom - Ieee Global Telecommunications Conference. 4: 2552-2556.  0.768
2004 Guo Y, Zhang J, McCain D, Cavallaro JR. Efficient MIMO equalization for downlink multi-code CDMA: Complexity optimization and comparative study Globecom - Ieee Global Telecommunications Conference. 4: 2513-2519.  0.371
2003 Jones BA, Cavallaro JR. A rapid prototyping environment for wireless communication embedded systems Eurasip Journal On Applied Signal Processing. 2003: 603-614. DOI: 10.1155/S111086570330304X  0.427
2003 Cavallaro JR, Vaya M. VITURBO: A reconfigurable architecture for viterbi and turbo decoding Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 2: 497-500.  0.464
2003 Guo Y, McCain D, Zhang J, Cavallaro JR. Scalable FPGA architectures for LMMSE-based SIMO chip equalizer in HSDPA downlink Conference Record of the Asilomar Conference On Signals, Systems and Computers. 2: 2171-2175.  0.339
2002 Rajagopal S, Bhashyam S, Cavallaro JR, Aazhang B. Real-time algorithms and architectures for multiuser channel estimation and detection in wireless base-station receivers Ieee Transactions On Wireless Communications. 1: 468-479. DOI: 10.1109/Twc.2002.800545  0.673
2002 Cavallaro JR. Architectures for heterogeneous multi-tier networks Wireless Personal Communications. 22: 285-296. DOI: 10.1023/A:1019932926420  0.375
2002 Rajagopal S, Bhashyam S, Cavallaro JR, Aazhang B. Efficient VLSI architectures for multiuser channel estimation in wireless base-station receivers Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 31: 143-156. DOI: 10.1023/A:1015393322264  0.349
2002 Xu G, Rajagopal S, Cavallaro JR, Aazhang B. VLSI implementation of the multistage detector for next generation wideband CDMA receivers Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 30: 21-33. DOI: 10.1023/A:1014086523082  0.316
2002 Livingston F, Chandrasekhar V, Vaya M, Cavallaro JR. Handset detector architectures for DS-CDMA wireless systems Proceedings - Ieee International Symposium On Circuits and Systems. 3.  0.325
2002 Leuschen ML, Cavallaro JR, Walker ID. Robotic fault detection using nonlinear analytical redundancy Proceedings - Ieee International Conference On Robotics and Automation. 1: 456-463.  0.754
2002 Rajagopal S, Rixner S, Cavallaro JR. A programmable baseband processor design for software defined radios Midwest Symposium On Circuits and Systems. 3.  0.376
2001 Rajagopal S, Cavallaro JR. A bit-streaming, pipelined multiuser detector for wireless communication receivers Materials Research Society Symposium - Proceedings. 626. DOI: 10.1109/ISCAS.2001.922187  0.597
2001 Sengupta C, Cavallaro JR, Aazhang B. On multipath channel estimation for CDMA systems using multiple sensors Ieee Transactions On Communications. 49: 543-553. DOI: 10.1109/26.911461  0.366
2001 Aazhang B, Cavallaro JR. Multitier wireless communications Wireless Personal Communications. 17: 323-330. DOI: 10.1023/A:1011233925507  0.351
2001 Leuschen ML, Walker ID, Cavallaro JR. Evaluating the reliability of prototype degradable systems Reliability Engineering and System Safety. 72: 9-20. DOI: 10.1016/S0951-8320(00)00097-1  0.765
2001 Chadha K, Cavallaro JR. A reconfigurable Viterbi decoder architecture Conference Record of the Asilomar Conference On Signals, Systems and Computers. 1: 66-71.  0.43
2001 Rajagopal S, Cavallaro JR. On-line arithmetic for detection in digital communication receivers Proceedings - Symposium On Computer Arithmetic. 257-265.  0.567
2001 Rajagopal S, Cavallaro JR. A bit-streaming, pipelined multiuser detector for wireless communication receivers Materials Research Society Symposium - Proceedings. 626.  0.597
1999 Sengupta C, Das S, Cavallaro JR, Aazhang B. Efficient multiuser receivers for CDMA systems Ieee Wireless Communications and Networking Conference, Wcnc. 3: 1461-1465. DOI: 10.1109/WCNC.1999.796980  0.328
1998 Das S, Sengupta C, Cavallaro JR. Hardware design issues for a mobile unit for next generation CDMA systems Proceedings of Spie - the International Society For Optical Engineering. 3461: 476-487. DOI: 10.1117/12.325707  0.394
1998 Sengupta C, Cavallaro JR, Aazhang B. Subspace-based Tracking of Multipath Channel Parameters for CDMA Systems European Transactions On Telecommunications. 9: 439-447. DOI: 10.1002/Ett.4460090506  0.412
1997 Sengupta C, Cavallaro JR, Wilson WL, Tittel FK. Automated evaluation of critical features in VLSI layouts based on photolithographic simulations Ieee Transactions On Semiconductor Manufacturing. 10: 482-494. DOI: 10.1109/66.641490  0.301
1996 Leuschen ML, Walker ID, Cavallaro JR. Robot reliability using fuzzy fault trees and Markov models Proceedings of Spie - the International Society For Optical Engineering. 2905: 73-91. DOI: 10.1117/12.256340  0.759
1996 Walker ID, Cavallaro JR. Failure mode analysis for a hazardous waste clean-up manipulator Reliability Engineering and System Safety. 53: 277-290. DOI: 10.1016/S0951-8320(96)00055-5  0.331
1995 Cavallaro JR, Walker ID. Protective operating system shell environment for robots Proceedings of Spie. 2589: 194-205. DOI: 10.1117/12.220958  0.319
1994 Hemkumar ND, Cavallaro JR. Redundant and On-Line CORDIC for Unitary Transformations Ieee Transactions On Computers. 43: 941-954. DOI: 10.1109/12.295856  0.375
1994 Visinsky ML, Cavallaro JR, Walker ID. Robotic fault detection and fault tolerance: A survey Reliability Engineering and System Safety. 46: 139-158. DOI: 10.1016/0951-8320(94)90132-5  0.313
1994 Walker ID, Cavallaro JR. Parallel VLSI architectures for real-time kinematics of redundant robots Journal of Intelligent &Amp; Robotic Systems. 9: 25-43. DOI: 10.1007/BF01258312  0.32
1993 Kota K, Cavallaro JR. Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors Ieee Transactions On Computers. 42: 769-779. DOI: 10.1109/12.237718  0.416
1988 Cavallaro JR, Luk FT. CORDIC arithmetic for an SVD processor Journal of Parallel and Distributed Computing. 5: 271-290. DOI: 10.1016/0743-7315(88)90021-4  0.409
1986 Cavallaro JR, Luk FT. Architectures for a cordic svd processor Proceedings of Spie - the International Society For Optical Engineering. 698: 45-53. DOI: 10.1117/12.976245  0.306
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