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Rabi N. Mahapatra - Publications

Affiliations: 
Texas A & M University, College Station, TX, United States 
Area:
Computer Science
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46 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Rasheed AA, Mahapatra RN, Hamza-Lup FG. Adaptive Group-Based Zero Knowledge Proof-Authentication Protocol in Vehicular Ad Hoc Networks Ieee Transactions On Intelligent Transportation Systems. 21: 867-881. DOI: 10.1109/Tits.2019.2899321  0.642
2020 Dass J, Narawane Y, Mahapatra RN, Sarin V. Distributed Training of Support Vector Machine on a Multiple-FPGA System Ieee Transactions On Computers. 69: 1015-1026. DOI: 10.1109/Tc.2020.2993552  0.69
2019 Dass J, Sarin V, Mahapatra RN. Fast and Communication-Efficient Algorithm for Distributed Support Vector Machine Training Ieee Transactions On Parallel and Distributed Systems. 30: 1065-1076. DOI: 10.1109/Tpds.2018.2879950  0.692
2018 Chittamuru SVR, Dang D, Pasricha S, Mahapatra R. BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures Ieee Transactions On Parallel and Distributed Systems. 29: 2402-2415. DOI: 10.1109/Tpds.2018.2833876  0.347
2018 Tang J, Xia L, Mahapatra R. An open-loop system design for deep space signal processing applications Acta Astronautica. 147: 259-272. DOI: 10.1016/J.Actaastro.2018.04.015  0.342
2013 Mandal S, Bhojwani P, Mohanty S, Mahapatra R. IntellBatt: The Smart Battery Ieee Computer. 1-1. DOI: 10.1109/Mc.2009.416  0.729
2012 Rasheed A, Mahapatra RN. The three-tier security scheme in wireless sensor networks with mobile sinks Ieee Transactions On Parallel and Distributed Systems. 23: 958-965. DOI: 10.1109/Tpds.2010.185  0.639
2011 Rasheed A, Mahapatra R. Key predistribution schemes for establishing pairwise keys with a mobile sink in sensor networks Ieee Transactions On Parallel and Distributed Systems. 23: 176-184. DOI: 10.1109/Tpds.2010.57  0.637
2011 Yu H, Mahapatra R. A power and throughput-efficient packet classifier with n Bloom filters Ieee Transactions On Computers. 60: 1182-1193. DOI: 10.1109/Tc.2010.213  0.486
2010 Mandal SK, Denton R, Mohanty SP, Mahapatra RN. Low power nanoscale buffer management for network on chip routers Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 245-250. DOI: 10.1145/1785481.1785540  0.321
2010 Kim Y, Mahapatra RN, Choi K. Design space exploration for efficient resource utilization in coarse-grained reconfigurable architecture Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 1471-1482. DOI: 10.1109/Tvlsi.2009.2025280  0.608
2010 Kim Y, Mahapatra RN. Dynamic context compression for low-power coarse-grained reconfigurable architecture Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 15-28. DOI: 10.1109/Tvlsi.2008.2006846  0.608
2010 Mandal SK, Mahapatra RN, Bhojwani PS, Mohanty SP. IntellBatt: Toward a smarter battery Computer. 43: 67-71. DOI: 10.1109/Mc.2010.72  0.739
2010 Mandal SK, Mahapatra R. PowerAntz: Ant behavior inspired power budget distribution scheme for Network-on-Chip systems Microelectronics Journal. 41: 523-531. DOI: 10.1016/J.Mejo.2010.05.005  0.62
2009 Kim Y, Mahapatra RN. Dynamic context management for low power coarse-grained reconfigurable architecture Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 33-38. DOI: 10.1145/1531542.1531555  0.334
2009 Kim Y, Mahapatra RN, Park I, Choi K. Low power reconfiguration technique for coarse-grained reconfigurable architecture Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 593-603. DOI: 10.1109/Tvlsi.2008.2006039  0.605
2009 Lee JD, Mahapatra RN, Bhojwani PS. A distributed concurrent on-line test scheduling protocol for many-core NoC-based systems Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 179-185. DOI: 10.1109/ICCD.2009.5413156  0.77
2009 Kougianos E, Mohanty SP, Mahapatra RN. Hardware assisted watermarking for multimedia Computers and Electrical Engineering. 35: 339-358. DOI: 10.1016/J.Compeleceng.2008.06.002  0.347
2009 Yoonjin K, Mahapatra RN. Hierarchical reconfigurable computing arrays for efficient CGRA-based embedded systems Proceedings - Design Automation Conference. 826-831.  0.31
2008 Dechev D, Mahapatra RN, Stroustrup B. Practical and Verifiable C++ Dynamic Cast for Hard Real-Time Systems Journal of Computing Science and Engineering. 2: 375-393. DOI: 10.5626/Jcse.2008.2.4.375  0.356
2008 Mandal SK, Mahapatra RN. PowerAntz: Distributed power sharing strategy for Network on Chip Proceedings of the International Symposium On Low Power Electronics and Design. 177-182. DOI: 10.1145/1393921.1393968  0.316
2008 Bhojwani PS, Mahapatra RN. Robust concurrent online testing of network-on-chip-based SoCs Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 1199-1209. DOI: 10.1109/Tvlsi.2008.2000732  0.776
2008 Singhal R, Choi G, Mahapatra RN. Data handling limits of on-chip interconnects Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 707-713. DOI: 10.1109/Tvlsi.2008.2000255  0.567
2008 Acharya S, Mahapatra R. A dynamic slack management technique for real-time distributed embedded systems Ieee Transactions On Computers. 57: 215-230. DOI: 10.1109/Tc.2007.70789  0.338
2008 Nolen JM, Mahapatra RN. Time-division-multiplexed test delivery for NoC systems Ieee Design and Test of Computers. 25: 44-51. DOI: 10.1109/Mdt.2008.27  0.408
2008 Lee JD, Gupta N, Bhojwani PS, Mahapatra RN. An on-demand test Triggering mechanism for NoC-based safety-critical systems Proceedings of the 9th International Symposium On Quality Electronic Design, Isqed 2008. 184-189. DOI: 10.1109/ISQED.2008.4479723  0.77
2008 Kim Y, Mahapatra RN. Reusable context pipelining for low power coarse-grained reconfigurable architecture Ipdps Miami 2008 - Proceedings of the 22nd Ieee International Parallel and Distributed Processing Symposium, Program and Cd-Rom. DOI: 10.1109/IPDPS.2008.4536523  0.305
2008 Lee JD, Mahapatra RN. In-field NoC-based SoC testing with distributed test vector storage 26th Ieee International Conference On Computer Design 2008, Iccd. 206-211. DOI: 10.1109/ICCD.2008.4751863  0.32
2008 Mandal SK, Bhojwani PS, Mohanty SP, Mahapatra RN. IntellBatt: Towards smarter battery design Proceedings - Design Automation Conference. 872-877. DOI: 10.1109/DAC.2008.4555942  0.772
2007 Bhojwani PS, Lee JD, Mahapatra RN. SAPP: Scalable and adaptable peak power management in nocs Proceedings of the International Symposium On Low Power Electronics and Design. 340-345. DOI: 10.1145/1283780.1283852  0.756
2007 Ahmad S, Mahapatra RN. An efficient approach to on-chip logic minimization Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 15: 1040-1050. DOI: 10.1109/Tvlsi.2007.902202  0.369
2007 Bhojwani P, Mahapatra RN. An infrastructure IP for online testing of network-on-chip based SoCs Proceedings - Eighth International Symposium On Quality Electronic Design, Isqed 2007. 867-872. DOI: 10.1109/ISQED.2007.35  0.328
2007 Kim Y, Mahapatra RN. Dynamically compressible context architecture for low power coarse-grained reconfigurable array 2007 Ieee International Conference On Computer Design, Iccd 2007. 395-400. DOI: 10.1109/ICCD.2007.4601930  0.318
2007 Lee JD, Bhojwani PS, Mahapatra RN. A safety analysis framework for COTS microprocessors in safety-critical applications Proceedings of Ieee International Symposium On High Assurance Systems Engineering. 407-408. DOI: 10.1109/HASE.2007.11  0.732
2007 Bhojwani PS, Mahapatra RN. A robust protocol for concurrent on-line test (COLT) of NoC-based systems-on-a-chip Proceedings - Design Automation Conference. 670-675. DOI: 10.1109/DAC.2007.375249  0.769
2006 Singhal R, Choi G, Mahapatra RN. Programmable LDPC decoder based on the bubble-sort algorithm Proceedings of the Ieee International Conference On Vlsi Design. 2006: 203-208. DOI: 10.1109/VLSID.2006.137  0.531
2006 Rajaram A, Hu J, Mahapatra R. Reducing clock skew variability via crosslinks Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 1176-1182. DOI: 10.1109/Tcad.2005.855928  0.35
2005 Chousein A, Mahapatra RN. Fully associative cache partitioning with don't care bits for real-time applications Acm Sigbed Review. 2: 35-38. DOI: 10.1145/1121788.1121799  0.352
2005 Mahapatra RN, Zhao W. An energy-efficient slack distribution technique for multimode distributed real-time embedded systems Ieee Transactions On Parallel and Distributed Systems. 16: 650-662. DOI: 10.1109/Tpds.2005.78  0.37
2005 Ravikumar VC, Mahapatra RN, Bhuyan LN. EaseCAM: An energy and storage efficient TCAM-based router architecture for IP lookup Ieee Transactions On Computers. 54: 521-533. DOI: 10.1109/Tc.2005.78  0.442
2005 Kumar A, Mahapatra RN. An integrated scheduling and buffer management scheme for input queued switches with finite buffer space Computer Communications. 29: 42-51. DOI: 10.1016/J.Comcom.2005.03.006  0.325
2004 Ravikumar VC, Mahapatra RN. TCAM architecture for IP lookup using prefix properties Ieee Micro. 24: 60-69. DOI: 10.1109/Mm.2004.1289292  0.353
2000 Mahapatra S, Mahapatra RN. Mapping of Neural Network Models onto Systolic Arrays Journal of Parallel and Distributed Computing. 60: 677-689. DOI: 10.1006/Jpdc.2000.1634  0.305
1999 Mahapatra S, Mahapatra RN, Chatterji BN. Mapping of neural network models onto massively parallel hierarchical computer systems Journal of Systems Architecture. 45: 919-929. DOI: 10.1016/S1383-7621(98)00013-7  0.318
1997 Mahapatra RN, Kumar A, Chatterji BN. Performance analysis of 2-D inverse fast cosine transform employing multiprocessors Ieee Transactions On Signal Processing. 45: 1323-1335. DOI: 10.1109/78.575703  0.358
1996 Tripathy CR, Patra S, Misra RB, Mahapatra RN. Reliability evaluation of multistage interconnection networks with multi-state elements Microelectronics Reliability. 36: 423-428. DOI: 10.1016/0026-2714(95)00084-4  0.336
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