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Wen-Tsong Shiue, Ph.D. - Publications

Affiliations: 
2000 Arizona State University, Tempe, AZ, United States 
Area:
Electronics and Electrical Engineering, Computer Science
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14 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2005 Shiue WT, Chakrabarti C. Multi-module multi-port memory design for low power embedded systems Design Automation For Embedded Systems. 9: 235-261. DOI: 10.1007/S10617-005-1195-3  0.474
2003 Lee C, Shiue WT. Consideration of control system and memory contributions in practical resource-constrained scheduling for low power Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2799: 590-598.  0.491
2002 Shiue WT. Low power memory design Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 2002: 55-64. DOI: 10.1109/ASAP.2002.1030704  0.522
2002 Shiue WT. Memory synthesis for low power ASIC design 2002 Ieee Asia-Pacific Conference On Asic, Ap-Asic 2002 - Proceedings. 335-342. DOI: 10.1109/APASIC.2002.1031600  0.563
2001 Shiue WT. Leakage power estimation and minimization in VLSI circuits Materials Research Society Symposium - Proceedings. 626. DOI: 10.1109/ISCAS.2001.922201  0.303
2001 Shiue WT, Chakrabarti C. Memory Design and Exploration for Low Power, Embedded Systems Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 29: 167-178. DOI: 10.1023/A:1012227328646  0.484
2001 Shiue WT. Low power multiport memories exploration and design Canadian Conference On Electrical and Computer Engineering. 2: 1285-1290.  0.538
2001 Shiue WT. Retargetable compilation for low power Hardware/Software Codesign - Proceedings of the International Workshop. 254-259.  0.472
2001 Shiue WT. Energy efficient memory assignment Proceedings - Ieee International Symposium On Circuits and Systems. 5: 415-418.  0.526
2001 Shiue WT. Energy-efficient backend compiler design for embedded systems Ieee Region 10 International Conference On Electrical and Electronic Technology. 103-109.  0.475
2001 Shiue WT, Udayanarayanan S, Chakrabarti C. Data memory design and exploration for low-power embedded systems Acm Transactions On Design Automation of Electronic Systems. 6: 553-568.  0.541
2000 Shiue WT, Chakrabarti C. Low-power scheduling with resources operating at multiple voltages Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 47: 536-543. DOI: 10.1109/82.847069  0.354
2000 Shiue WT. Minimizing area/energy for low power memory design using integer linear programming Midwest Symposium On Circuits and Systems. 2: 984-987.  0.536
1999 Hsiao SF, Shiue WR, Tseng JM. A cost-efficient and fully-pipelinable architecture for DCT/IDCT Ieee Transactions On Consumer Electronics. 45: 515-525. DOI: 10.1109/30.793535  0.302
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