Alexandru Nicolau - Publications

Affiliations: 
University of California, Irvine, Irvine, CA 
Area:
Computer Science

86 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2016 Chen Z, Nicolau A, Veidenbaum AV. SIMD-based soft error detection 2016 Acm International Conference On Computing Frontiers - Proceedings. 45-54. DOI: 10.1145/2903150.2903170  1
2015 Shi Y, Veidenbaum AV, Nicolau A, Xu X. Large-scale neural circuit mapping data analysis accelerated with the graphical processing unit (GPU). Journal of Neuroscience Methods. 239: 1-10. PMID 25277633 DOI: 10.1016/J.Jneumeth.2014.09.022  1
2014 Ebcioglu K, Nicolau A. A global resource-constrained parallelization technique Proceedings of the International Conference On Supercomputing. 112-121. DOI: 10.1145/2591635.2667160  1
2014 Ebcioʇlu K, Nicolau A. Author retrospective for a global resource-constrained parallelization technique Proceedings of the International Conference On Supercomputing. 7-8. DOI: 10.1145/2591635.2591642  1
2013 Gupta P, Agarwal Y, Dolecek L, Dutt N, Gupta RK, Kumar R, Mitra S, Nicolau A, Rosing TS, Srivastava MB, Swanson S, Sylvester D. Underdesigned and opportunistic computing in presence of hardware variability Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 8-23. DOI: 10.1109/Tcad.2012.2223467  1
2013 Cammarota R, Nicolau A, Veidenbaum AV. Just in time load balancing Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 7760: 1-16. DOI: 10.1007/978-3-642-37658-0_1  1
2011 D'Alberto P, Bodrato M, Nicolau A. Exploiting parallelism in matrix-computation kernels for symmetric multiprocessor systems: Matrix-multiplication and matrix-addition algorithm optimizations by software pipelining and threads allocation Acm Transactions On Mathematical Software. 38. DOI: 10.1145/2049662.2049664  1
2011 Nicolau A, Kejariwal A. How many threads to spawn during program multithreading? Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6548: 166-183. DOI: 10.1007/978-3-642-19595-2_12  1
2009 Nicolau A, Li G, Veidenbaum AV, Kejariwal A. Synchronization optimizations for efficient execution on multi-cores Proceedings of the International Conference On Supercomputing. 169-180. DOI: 10.1145/1542275.1542303  1
2009 Nicolau A, Li G, Kejariwal A. Techniques for efficient placement of synchronization primitives Acm Sigplan Notices. 44: 199-208. DOI: 10.1145/1504176.1504207  1
2009 D'Alberto P, Nicolau A. Adaptive Winograd's matrix multiplications Acm Transactions On Mathematical Software. 36. DOI: 10.1145/1486525.1486528  1
2009 Kejariwal A, Veidenbaum AV, Nicolau A, Girkar M, Tian X, Saito H. On the exploitation of loop-level parallelism in embedded applications Transactions On Embedded Computing Systems. 8. DOI: 10.1145/1457255.1457257  1
2009 Moorkanikara Nageswaran J, Felch A, Chandrasekhar A, Dutt N, Granger R, Nicolau A, Veidenbaum A. Brain derived vision algorithm on high performance architectures International Journal of Parallel Programming. 37: 345-369. DOI: 10.1007/S10766-009-0106-9  1
2009 Ghodrat MA, Givargis T, Nicolau A. Optimizing control flow in loops using interval and dependence analysis Design Automation For Embedded Systems. 13: 193-221. DOI: 10.1007/S10617-009-9043-5  1
2008 Ghodrat MA, Givargis T, Nicolau A. Control flow optimization in loops using interval analysis Embedded Systems Week 2008 - Proceedings of the 2008 International Conference On Compilers, Architecture and Synthesis For Embedded Systems, Cases'08. 157-166. DOI: 10.1145/1450095.1450120  1
2008 Badea C, Nicolau A, Veidenbaum AV. Impact of JVM SuperOperators on energy consumption in resource-constrained embedded systems Proceedings of the Acm Sigplan Conference On Languages, Compilers, and Tools For Embedded Systems (Lctes). 23-30. DOI: 10.1145/1375657.1375661  1
2008 Nicolaescu D, Veidenbaum A, Nicolau A. Using a way cache to improve performance of set-associative caches Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4759: 93-104.  1
2008 Kejariwal A, Nicolau A, Polychronopoulos CD. Enhanced loop coalescing: A compiler technique for transforming non-uniform iteration spaces Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4759: 17-32.  1
2008 D'Alberto P, Nicolau A. Using recursion to boost ATLAS's performance Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4759: 142-151.  1
2007 Badea C, Nicolau A, Veidenbaum AV. A simplified java bytecode compilation system for resource-constrained embedded processors Cases'07: Proceedings of the 2007 International Conference On Compilers, Architecture, and Synthesis For Embedded Systems. 218-228. DOI: 10.1145/1289881.1289920  1
2007 D'Alberto P, Nicolau A. Adaptive Strassen's matrix multiplication Proceedings of the International Conference On Supercomputing. 284-292. DOI: 10.1145/1274971.1275010  1
2007 Tang W, Kejariwal A, Veidenbaum AV, Nicolau A. A predictive decode filter cache for reducing power consumption in embedded processors Acm Transactions On Design Automation of Electronic Systems. 12. DOI: 10.1145/1230800.1230806  1
2007 Shrivastava A, Sanghyun P, Earlie E, Dutt ND, Nicolau A, Yunheung P. Automatic Design Space Exploration of Register Bypasses in Embedded Processors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 2102-2115. DOI: 10.1109/Tcad.2007.907066  0.4
2007 Mohapatra S, Dutt N, Nicolau A, Venkatasubramanian N. DYNAMO: A cross-layer framework for end-to-end QoS and energy optimization in mobile handheld devices Ieee Journal On Selected Areas in Communications. 25: 722-737. DOI: 10.1109/Jsac.2007.070509  1
2007 Ghodrat MA, Givargis T, Nicolau A. Short-circuit compiler transformation: Optimizing conditional blocks Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 504-510. DOI: 10.1109/ASPDAC.2007.358036  1
2007 D'Alberto P, Nicolau A. R-Kleene: A high-performance divide-and-conquer algorithm for the all-pair shortest path for densely connected networks Algorithmica (New York). 47: 203-213. DOI: 10.1007/S00453-006-1224-Z  1
2006 Ghodrat MA, Givargis T, Nicolau A. Expression equivalence checking using interval analysis Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 14: 830-842. DOI: 10.1109/Tvlsi.2006.878471  1
2006 Kejariwal A, Gupta S, Nicolau A, Dutt ND, Gupta R. Energy efficient watermarking on mobile devices using proxy-based partitioning Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 14: 625-635. DOI: 10.1109/Tvlsi.2006.878218  1
2006 Kejariwal A, Nicolau A, Polychronopoulos CD. An efficient approach for self-scheduling parallel loops on multiprogrammed parallel computers Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4339: 441-449. DOI: 10.1007/978-3-540-69330-7_31  1
2005 Kejariwal A, Nicolau A, Banerjee U, Polychronopoulos CD. A novel approach for partitioning iteration spaces with variable densities Proceedings of the Acm Sigplan Symposium On Principles and Practice of Parallel Programming, Ppopp. 120-131. DOI: 10.1145/1065944.1065962  1
2005 D'Alberto P, Nicolau A, Veidenbaum A, Gupta R. Line size adaptivity analysis of parameterized loop nests for direct mapped data cache Ieee Transactions On Computers. 54: 185-197. DOI: 10.1109/Tc.2005.28  1
2005 Kejariwal A, Nicolau A. An efficient load balancing scheme for grid-based high performance scientific computing Ispdc 2005: 4th International Symposium On Parallel and Distributed Computing. 2005: 217-225. DOI: 10.1109/ISPDC.2005.14  1
2005 D'Alberto P, Nicolau A. Adaptive Strassen and ATLAS'S DGEMM: A Fast Square-Matrix Multiply for Modern High-Performance Systems Proceedings - Eighth International Conference On High-Performance Computing in Asia-Pacific Region, Hpc Asia 2005. 2005: 45-52. DOI: 10.1109/HPCASIA.2005.18  1
2005 D'Alberto P, Nicolau A. JuliusC: A practical approach for the analysis of divide-and-conquer algorithms Lecture Notes in Computer Science. 3602: 117-131.  1
2005 Ghodrat MA, Givargis T, Nicolau A. Equivalence Checking of Arithmetic Expressions using Fast Evaluation Cases 2005: International Conference On Compilers, Architecture, and Synthesis For Embedded Systems. 147-156.  1
2004 Nicolaescu D, Veidenbaum A, Nicolau A. Caching values in the load store queue Proceedings - Ieee Computer Society's Annual International Symposium On Modeling, Analysis, and Simulation of Computer and Telecommunications Systems, Mascots. 580-587. DOI: 10.1109/MASCOT.2004.1348315  1
2004 D'Alberto P, Nicolau A, Veidenbaum A. A data cache with dynamic mapping Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2958: 436-450.  1
2003 Tang W, Veidenbaum A, Nicolau A. Dynamically adaptive fetch size prediction for data caches Proceedings of the Innovative Architecture For Future Generation High-Performance Processors and Systems. 2003: 40-44. DOI: 10.1109/IWIA.2003.1262781  1
2003 Nicolaescu D, Veidenbaum A, Nicolau A. Reducing power consumption for high-associativity data caches in embedded processors Proceedings -Design, Automation and Test in Europe, Date. 1064-1068. DOI: 10.1109/DATE.2003.1253745  1
2003 Gupta S, Dutt N, Gupta R, Nicolau A. Dynamically increasing the scope of code motions during the high-level synthesis of digital circuits Iee Proceedings: Computers and Digital Techniques. 150: 330-337. DOI: 10.1049/ip-cdt:20030839  1
2003 Nicolaescu D, Veidenbaum A, Nicolau A. Reducing Data Cache Energy Consumption via Cached Load/Store Queue Proceedings of the International Symposium On Low Power Electronics and Design. 252-257.  1
2002 Tang W, Veidenbaum AV, Nicolau A. Reducing power with an L0 instruction cache using history-based prediction Proceedings of the Innovative Architecture For Future Generation High-Performance Processors and Systems. 2002: 11-18. DOI: 10.1109/IWIA.2002.1035013  1
2002 Mishra P, Tomiyama H, Dutt N, Nicolau A. Automatic verification of in-order execution in microprocessors with fragmented pipelines and multicycle functional units Proceedings -Design, Automation and Test in Europe, Date. 36-43. DOI: 10.1109/DATE.2002.998247  1
2002 Tang W, Veidenbaum A, Nicolau A, Gupta R. Integrated i-cache way predictor and branch target buffer to reduce energy consumption Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2327: 120-132. DOI: 10.1007/3-540-47847-7_12  1
2001 Mishra P, Dutt N, Nicolau A. Functional abstraction driven design space exploration of heterogeneous programmable architectures Proceedings of the International Symposium On System Synthesis. 256-261.  1
2001 Grun P, Dutt N, Nicolau A. APEX: Access pattern based memory architecture exploration Proceedings of the International Symposium On System Synthesis. 25-32.  1
2001 Tang W, Gupta R, Nicolau A. Design of a predictive filter cache for energy savings in high performance processor architectures Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 68-73.  1
2001 Mishra P, Grun P, Dutt N, Nicolau A. Processor-memory co-exploration driven by a memory-aware architecture description language Proceedings of the Ieee International Conference On Vlsi Design. 70-75.  1
2000 Panda PR, Dutt ND, Nicolau A. On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems Acm Transactions On Design Automation of Electronic Systems. 5: 682-704. DOI: 10.1145/348019.348570  1
2000 Azevedo A, Nicolau A, Hummel J. Annotation-aware Java virtual machine implementation Concurrency Practice and Experience. 12: 423-444. DOI: 10.1002/1096-9128(200005)12:6<423::AID-CPE483>3.0.CO;2-L  1
1999 Wang H, Dutt ND, Nicolau A. Exploring scalable schedules for IIR filters with resource constraints Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 46: 1367-1379. DOI: 10.1109/82.803476  0.4
1999 Panda PR, Dutt ND, Nicolau A. Local memory exploration and optimization in embedded systems Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 3-13. DOI: 10.1109/43.739054  0.4
1999 Kolson DJ, Nicolau A, Dutt N. Copy elimination for parallelizing compilers Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1656: 275-289.  1
1999 Khare A, Panda PR, Dutt ND, Nicolau A. High-level synthesis with SDRAMs and RAMBUS DRAMs Ieice Transactions On Fundamentals of Electronics, Communications and Computer Sciences. 2347-2355.  0.4
1998 Panda PR, Dutt ND, Nicolau A. Data cache sizing for embedded processor applications Proceedings -Design, Automation and Test in Europe, Date. 925-926. DOI: 10.1109/DATE.1998.655972  1
1998 Panda PR, Dutt ND, Nicolau A. Incorporating DRAM access modes into high-level synthesis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 96-109. DOI: 10.1109/43.681260  0.4
1998 Bilardi G, Nicolau A, Hummel J. A systematic approach to branch speculation Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1366: 394-411. DOI: 10.1007/BFb0032707  1
1997 Panda PR, Dutt ND, Nicolau A. Memory data organization for improved cache performance in embedded processor applications Acm Transactions On Design Automation of Electronic Systems. 2: 384-409. DOI: 10.1145/268424.268464  1
1997 Novack S, Nicolau A. Resource-directed loop pipelining: Exposing just enough parallelism Computer Journal. 40. DOI: 10.1093/Comjnl/40.6.311  1
1997 Brownhill CJ, Nicolau A, Novack S, Polychronopoulos CD. Achieving multi-level parallelization Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1336: 183-194. DOI: 10.1007/BFb0024215  1
1997 Panda PR, Nakamura H, Dutt ND, Nicolau A. Improving cache performance through tiling and data alignment Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1253: 168-185. DOI: 10.1007/3-540-63138-0_16  1
1997 Hummel J, Azevedo A, Kolson D, Nicolau A. Annotating the Java bytecodes in support of optimization Concurrency Practice and Experience. 9: 1003-1016. DOI: 10.1002/(Sici)1096-9128(199711)9:11<1003::Aid-Cpe346>3.0.Co;2-G  1
1996 Novack S, Hummel J, Nicolau A. A simple mechanism for improving the accuracy and efficiency of instruction-level disambiguation Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1033: 289-303.  1
1995 Gong J, Gajski DD, Nicolau A. Performance Evaluation for Application-Specific Architectures Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 3: 483-490. DOI: 10.1109/92.475967  1
1995 Aiken A, Nicolau A, Novack S. Resource-Constrained Software Pipelining Ieee Transactions On Parallel and Distributed Systems. 6: 1248-1270. DOI: 10.1109/71.476167  1
1995 Capitanio A, Nicolau A, Dutt N. A hypergraph-based model for port allocation on multiple-register-file VLIW architectures International Journal of Parallel Programming. 23: 499-513. DOI: 10.1007/Bf02577864  1
1995 Novack S, Nicolau A. A hierarchical approach to instruction-level parallelization International Journal of Parallel Programming. 23: 35-62. DOI: 10.1007/Bf02577783  1
1995 Novack S, Nicolau A. Mutation scheduling: A unified approach to compiling for fine-grain parallelism Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 892: 16-30.  1
1994 Hummel J, Hendren LJ, Nicolau A. A general data dependence test for dynamic, pointer-based data structures Acm Sigplan Notices. 29: 218-229. DOI: 10.1145/773473.178262  1
1994 Capitanio A, Dutt N, Nicolau A. Partitioning of variables for multiple-register-file VLIW architectures Proceedings of the International Conference On Parallel Processing. 1. DOI: 10.1109/ICPP.1994.155  1
1994 Capitanio A, Dutt N, Nicolau A. Partitioning of variables for multiple-register-file architectures via hypergraph coloring Ifip Transactions a: Computer Science and Technology. 319-322.  1
1992 Hummel J, Hendren LJ, Nicolau A. Abstract Description of Pointer Data Structures: An Approach for Improving the Analysis and Optimization of Imperative Programs Acm Letters On Programming Languages and Systems (Loplas). 1: 243-260. DOI: 10.1145/151640.151644  1
1992 Hendren LJ, Hummell J, Nicolau A. Abstractions for Recursive Pointer Data Structures: Improving the Analysis and Transformation of Imperative Programs Acm Sigplan Notices. 27: 249-260. DOI: 10.1145/143103.143138  1
1991 Nicolau A, Wang H. Optimal Schedules for Parallel Prefix Computation with Bounded Resources Acm Sigplan Notices. 26: 1-10. DOI: 10.1145/109626.109627  1
1990 Hendren LJ, Nicolau A. Parallelizing Programs with Recursive Data Structures Ieee Transactions On Parallel and Distributed Systems. 1: 35-47. DOI: 10.1109/71.80123  1
1990 Beck M, Pingali KK, Nicolau A. Static scheduling for dynamic dataflow machines Journal of Parallel and Distributed Computing. 10: 279-288. DOI: 10.1016/0743-7315(90)90030-S  1
1989 Nicolau A. Runtime Disambiguation: Coping with Statically Unpredictable Dependencies Ieee Transactions On Computers. 38: 663-678. DOI: 10.1109/12.24269  1
1988 Aiken A, Nicolau A. Optimal Loop Parallelization Acm Sigplan Notices. 23: 308-317. DOI: 10.1145/960116.54021  1
1988 Aiken A, Nicolau A. A Development Environment for Horizontal Microcode Ieee Transactions On Software Engineering. 14: 584-594. DOI: 10.1109/32.6136  1
1988 Nicolau A. Loop quantization: A generalized loop unwinding technique Journal of Parallel and Distributed Computing. 5: 568-586. DOI: 10.1016/0743-7315(88)90013-5  1
1988 Nicolau A, Pingali K, Aiken A. Fine-grain compilation for pipelined machines The Journal of Supercomputing. 2: 279-295. DOI: 10.1007/Bf00129781  1
1986 Nicolau A. A development environment for scientific parallel programs Applied Mathematics and Computation. 20: 175-183. DOI: 10.1016/0096-3003(86)90132-3  1
1986 Karplus K, Nicolau A. A compiler-driven supercomputer Applied Mathematics and Computation. 20: 95-110. DOI: 10.1016/0096-3003(86)90128-1  1
1984 Fisher JA, Ellis JR, Ruttenberg JC, Nicolau A. Parallel Processing: A Smart Compiler and a Dumb Machine Acm Sigplan Notices. 19: 37-47. DOI: 10.1145/502949.502878  1
1984 Nicolau A, Fisher JA. Measuring the Parallelism Available for Very Long Instruction Word Architectures Ieee Transactions On Computers. 968-976. DOI: 10.1109/TC.1984.1676371  1
1983 Cohen J, Nicolau A. Comparison of Compacting Algorithms for Garbage Collection Acm Transactions On Programming Languages and Systems (Toplas). 5: 532-553. DOI: 10.1145/69575.357226  1
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