Weichen Liu, Ph.D. - Publications

Affiliations: 
2011 Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong 
Area:
Computer Science

41 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Li M, Liu W, Guan N, Xie Y, Ye Y. Hardware-Software Collaborative Thermal Sensing in Optical Network-on-Chip--based Manycore Systems Acm Transactions in Embedded Computing Systems. 18: 1-24. DOI: 10.1145/3362099  0.352
2020 Guo P, Hou W, Guo L, Sun W, Liu C, Bao H, Duong LHK, Liu W. Fault-Tolerant Routing Mechanism in 3D Optical Network-on-Chip Based on Node Reuse Ieee Transactions On Parallel and Distributed Systems. 31: 547-564. DOI: 10.1109/Tpds.2019.2939240  0.348
2020 Chen P, Liu W, Chen H, Li S, Li M, Yang L, Guan N. Reduced Worst-Case Communication Latency Using Single-Cycle Multi-Hop Traversal Network-on-Chip Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1-1. DOI: 10.1109/Tcad.2020.3015440  0.316
2020 Li M, Liu W, Duong LHK, Chen P, Yang L, Xiao C. Contention-aware Routing for Thermal-Reliable Optical Networks-on-Chip Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1-1. DOI: 10.1109/Tcad.2020.2994261  0.302
2020 Zhang W, Guan N, Ju L, Tang Y, Liu W, Jia Z. Scope-Aware Useful Cache Block Calculation for Cache-Related Preemption Delay Analysis with Set-Associative Data Caches Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1-1. DOI: 10.1109/Tcad.2019.2937807  0.354
2020 Ye Y, Zhang W, Liu W. Thermal-Aware Design and Simulation Approach for Optical NoCs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 1-1. DOI: 10.1109/Tcad.2019.2935407  0.346
2020 Liu W, Tian G, Li M. Autonomous temperature sensing for optical network-on-chip Journal of Systems Architecture. 102: 101650. DOI: 10.1016/J.Sysarc.2019.101650  0.422
2019 Wang K, Jiang X, Guan N, Liu D, Liu W, Deng Q. Real-Time Scheduling of DAG Tasks with Arbitrary Deadlines Acm Transactions On Design Automation of Electronic Systems. 24: 1-22. DOI: 10.1145/3358603  0.321
2019 Chen P, Liu W, Jiang X, He Q, Guan N. Timing-Anomaly Free Dynamic Scheduling of Conditional DAG Tasks on Multi-Core Systems Acm Transactions in Embedded Computing Systems. 18: 1-19. DOI: 10.1145/3358236  0.327
2019 Han M, Guan N, Sun J, He Q, Deng Q, Liu W. Response Time Bounds for Typed DAG Parallel Tasks on Heterogeneous Multi-Cores Ieee Transactions On Parallel and Distributed Systems. 30: 2567-2581. DOI: 10.1109/Tpds.2019.2916696  0.365
2019 Zhong K, Liu D, Wu Y, Long L, Liu W, Ren J, Liu R, Liang L, Shao Z, Li T. Towards Fast and Lightweight Checkpointing for Mobile Virtualization Using NVRAM Ieee Transactions On Parallel and Distributed Systems. 30: 1421-1433. DOI: 10.1109/Tpds.2018.2886906  0.314
2019 Liu W, Yi J, Li M, Chen P, Yang L. Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1-14. DOI: 10.1109/Tcad.2018.2801242  0.383
2019 Xiao C, Zhang L, Liu W, Cheng L, Li P, Pan Y, Bergmann N. NV-eCryptfs: Accelerating Enterprise-Level Cryptographic File System with Non-Volatile Memory Ieee Transactions On Computers. 68: 1338-1352. DOI: 10.1109/Tc.2018.2889691  0.406
2019 Yang L, Liu W, Guan N, Dutt N. Optimal Application Mapping and Scheduling for Network-on-Chips with Computation in STT-RAM Based Router Ieee Transactions On Computers. 68: 1174-1189. DOI: 10.1109/Tc.2018.2864749  0.429
2019 Zhao M, Liu D, Jiang X, Liu W, Xue G, Xie C, Yang Y, Guo Z. CASS: Criticality-Aware Standby-Sparing for Real-Time Systems Journal of Systems Architecture. 100: 101661. DOI: 10.1016/J.Sysarc.2019.101661  0.409
2019 Liu S, Guan N, Ji D, Liu W, Liu X, Yi W. Leaking your engine speed by spectrum analysis of real-Time scheduling sequences Journal of Systems Architecture. 97: 455-466. DOI: 10.1016/J.Sysarc.2019.01.004  0.312
2019 Xiao C, Zhang L, Liu W, Bergmann N, Xie Y. Energy-efficient crypto acceleration with HW/SW co-design for HTTPS Future Generation Computer Systems. 96: 336-347. DOI: 10.1016/J.Future.2019.02.023  0.371
2018 Xiao C, Zhang L, Xie Y, Liu W, Liu D. Hardware/Software Adaptive Cryptographic Acceleration for Big Data Processing Security and Communication Networks. 2018: 1-24. DOI: 10.1155/2018/7631342  0.403
2018 Chen C, Jiao S, Zhang S, Liu W, Feng L, Wang Y. TripImputor: Real-Time Imputing Taxi Trip Purpose Leveraging Multi-Sourced Urban Data Ieee Transactions On Intelligent Transportation Systems. 19: 3292-3304. DOI: 10.1109/Tits.2017.2771231  0.316
2018 Zhang W, Guan N, Ju L, Liu W. Analyzing Data Cache Related Preemption Delay With Multiple Preemptions Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 2255-2265. DOI: 10.1109/Tcad.2018.2857079  0.347
2018 Li M, Liu W, Yang L, Chen P, Chen C. Chip Temperature Optimization for Dark Silicon Many-Core Systems Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 1-1. DOI: 10.1109/Tcad.2017.2740306  0.339
2018 Liu W, Yang L, Jiang W, Feng L, Guan N, Zhang W, Dutt N. Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip Ieee Transactions On Computers. 67: 1818-1834. DOI: 10.1109/Tc.2018.2844365  0.414
2018 Xiao C, Li P, Zhang L, Liu W, Bergmann N. ACA-SDS: Adaptive Crypto Acceleration for Secure Data Storage in Big Data Ieee Access. 6: 44494-44505. DOI: 10.1109/Access.2018.2862425  0.351
2017 Yang L, Liu W, Jiang W, Li M, Chen P, Sha EH. FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era Ieee Transactions On Parallel and Distributed Systems. 28: 1905-1918. DOI: 10.1109/Tpds.2016.2643669  0.427
2017 Yang L, Liu W, Jiang W, Chen C, Li M, Chen P, Sha EHM. Hardware-software collaboration for dark silicon heterogeneous many-core systems Future Generation Computer Systems. 68: 234-247. DOI: 10.1016/J.Future.2016.09.012  0.435
2016 Liu W, Xiao C. An efficient technique of application mapping and scheduling on real-time multiprocessor systems for throughput optimization Acm Transactions On Embedded Computing Systems. 15. DOI: 10.1145/2950051  0.383
2016 Yang L, Liu W, Jiang W, Li M, Yi J, Sha EHM. Application Mapping and Scheduling for Network-on-Chip-Based Multiprocessor System-on-Chip With Fine-Grain Communication Optimization Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2016.2535359  0.416
2016 Liu W, Zhang W, Wang X, Xu J. Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 1546-1559. DOI: 10.1109/Tvlsi.2015.2452910  0.422
2016 Xiao C, Liu W. Through Global Sharing to Improve Network Efficiency for Radio-Frequency Interconnect Based Network-on-Chip Ieee Access. 4: 6503-6514. DOI: 10.1109/Access.2016.2611141  0.383
2014 Liu W, Wang X, Xu J, Zhang W, Ye Y, Wu X, Nikdast M, Wang Z. On-chip sensor networks for soft-error tolerant real-time multiprocessor systems-on-chip Acm Journal On Emerging Technologies in Computing Systems. 10: 1-20. DOI: 10.1145/2564928  0.411
2014 Wu X, Ye Y, Xu J, Zhang W, Liu W, Nikdast M, Wang X. UNION: A Unified Inter/Intrachip Optical Network for Chip Multiprocessors Ieee Transactions On Very Large Scale Integration Systems. 22: 1082-1095. DOI: 10.1109/Tvlsi.2013.2263397  0.371
2013 Xie Y, Nikdast M, Xu J, Wu X, Zhang W, Ye Y, Wang X, Wang Z, Liu W. Formal Worst-Case Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 1823-1836. DOI: 10.1109/Tvlsi.2012.2220573  0.321
2013 Ye Y, Xu J, Wu X, Zhang W, Wang X, Nikdast M, Wang Z, Liu W. System-Level Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 292-305. DOI: 10.1109/Tvlsi.2012.2185524  0.415
2013 Liu W, Wang Y, Wang X, Xu J, Yang H. On-Chip Sensor Network for Efficient Management of Power Gating-Induced Power/Ground Noise in Multiprocessor System on Chip Ieee Transactions On Parallel and Distributed Systems. 24: 767-777. DOI: 10.1109/Tpds.2012.193  0.373
2013 Ye Y, Xu J, Huang B, Wu X, Zhang W, Wang X, Nikdast M, Wang Z, Liu W, Wang Z. 3-D Mesh-Based Optical Network-on-Chip for Multiprocessor System-on-Chip Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 584-596. DOI: 10.1109/Tcad.2012.2228739  0.334
2012 Ye Y, Xu J, Wu X, Zhang W, Liu W, Nikdast M. A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip Acm Journal On Emerging Technologies in Computing Systems. 8: 1-26. DOI: 10.1145/2093145.2093150  0.368
2011 Wang Y, Xu J, Xu Y, Liu W, Yang H. Power Gating Aware Task Scheduling in MPSoC Ieee Transactions On Very Large Scale Integration Systems. 19: 1801-1812. DOI: 10.1109/Tvlsi.2010.2055907  0.334
2011 Liu W, Gu Z, Xu J, Wu X, Ye Y. Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems Ieee Transactions On Parallel and Distributed Systems. 22: 1382-1389. DOI: 10.1109/Tpds.2010.204  0.38
2011 Liu W, Xu J, Muppala JK, Zhang W, Wu X, Ye Y. Coroutine-based synthesis of efficient embedded software from SystemC models Ieee Embedded Systems Letters. 3: 46-49. DOI: 10.1109/Les.2011.2112634  0.594
2009 Liu W, Gu Z, Xu J. Efficient Software Synthesis for Dynamic Single Appearance Scheduling of Synchronous Dataflow Ieee Embedded Systems Letters. 1: 69-72. DOI: 10.1109/Les.2009.2039851  0.406
2009 Gu Z, Liu W, Xu J, Cui J, He X, Deng Q. Efficient algorithms for 2D area management and online task placement on runtime reconfigurable FPGAs Microprocessors and Microsystems. 33: 374-387. DOI: 10.1016/J.Micpro.2009.05.001  0.548
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