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Abu Asaduzzaman, Ph.D. - Publications

Affiliations: 
Wichita State University, Wichita, KS, United States 
Area:
Computer Engineering, Computer Science
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42 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2018 Asaduzzaman A, Mazumder S, Salinas S. A promising security protocol for protecting near field communication devices from networking attacks International Journal of Security and Networks. 13: 98-107. DOI: 10.1504/Ijsn.2018.10013686  0.346
2018 Chidella KK, Asaduzzaman A. A novel Wireless Network-on-Chip architecture with distributed directories for faster execution and minimal energy Computers & Electrical Engineering. 65: 18-31. DOI: 10.1016/J.Compeleceng.2017.12.038  0.443
2017 Asaduzzaman A, Chidella KK, Vardha D. An Energy-Efficient Directory Based Multicore Architecture with Wireless Routers to Minimize the Communication Latency Ieee Transactions On Parallel and Distributed Systems. 28: 374-385. DOI: 10.1109/Tpds.2016.2571282  0.46
2015 Asaduzzaman A, Gummadi D, Waichal P. A promising parallel algorithm to manage the RSA decryption complexity Conference Proceedings - Ieee Southeastcon. 2015. DOI: 10.1109/SECON.2015.7132926  0.322
2014 Asaduzzaman A, Lee HY. GPU computing to improve game engine performance Journal of Engineering and Technological Sciences. 46: 226-243. DOI: 10.5614/J.Eng.Technol.Sci.2014.46.2.8  0.396
2014 Asaduzzaman A, Asmatulu R, Rahman M. Teaching Parallel Programming for Time-Efficient Computer Applications International Journal of Computer Applications. 90: 18-25. DOI: 10.5120/15585-4264  0.347
2014 Asaduzzaman A, Allen MP, Jareen T. An effective locking-free caching technique for power-aware multicore computing systems 2014 International Conference On Informatics, Electronics and Vision, Iciev 2014. DOI: 10.1109/ICIEV.2014.6850861  0.511
2014 Asaduzzaman A, Gunasekara GH. Power and performance analysis of multimedia applications running on low-power devices by cache modeling Multimedia Tools and Applications. 72: 207-230. DOI: 10.1007/S11042-012-1350-3  0.592
2013 Asaduzzaman A, Suryanarayana VR, Rahman M. Performance-power analysis of H.265/HEVC and H.264/AVC running on multicore cache systems Ispacs 2013 - 2013 International Symposium On Intelligent Signal Processing and Communication Systems. 174-179. DOI: 10.1109/ISPACS.2013.6704542  0.491
2013 Asaduzzaman A, Sibai FN, Aramco S, El-Sayed H. Performance and power comparisons of MPI Vs Pthread implementations on multicore systems 2013 9th International Conference On Innovations in Information Technology, Iit 2013. 1-6. DOI: 10.1109/Innovations.2013.6544384  0.418
2013 Mridh MF, Asaduzzaman A, Saha AK. An effective measurement technique of level-2 cache performance for multicore embedded systems 2013 International Conference On Informatics, Electronics and Vision, Iciev 2013. DOI: 10.1109/ICIEV.2013.6572566  0.444
2013 Asaduzzaman A, Chaturvedula SR, Pendse R. A novel folded-torus based network architecture for power-aware multicore systems Computers and Electrical Engineering. 39: 2494-2506. DOI: 10.1016/J.Compeleceng.2013.09.001  0.476
2013 Asaduzzaman A, Suryanarayana VR, Sibai FN. On level-1 cache locking for high-performance low-power real-time multicore systems Computers and Electrical Engineering. 39: 1333-1345. DOI: 10.1016/J.Compeleceng.2013.03.013  0.473
2012 Suryanarayana V, Dhanekula S, Asaduzzaman A, Pendse R. Desktop visualization in cloud and BWT compression Proceedings of the Iasted International Conference On Parallel and Distributed Computing and Systems. 70-77. DOI: 10.2316/P.2012.789-027  0.36
2012 Asaduzzaman A, Papri RJ, Rahman M. A power-aware versatile victim cache to reduce average memory latency in parallel architectures Proceedings of the Iasted International Conference On Parallel and Distributed Computing and Systems. 155-161. DOI: 10.2316/P.2012.789-007  0.552
2012 Asaduzzaman A, Chaturvedula R, Pendse R. Folded torus based power aware interconnection topology for high-performance multicore architecture Proceedings of the Iasted International Conference On Parallel and Distributed Computing and Systems. 143-149. DOI: 10.2316/P.2012.789-006  0.41
2012 Asaduzzaman A, Gunasekara GH. Impact of data dependent computation of parallel programming in multiprocessor systems Proceedings of the Iasted International Conference On Engineering and Applied Science, Eas 2012. 56-61. DOI: 10.2316/P.2012.785-105  0.343
2012 Gunasekara GH, Asaduzzaman A. A concurrency modeling technique for performance evaluation of multiprocessor and multicore systems Proceedings of the Iasted International Conference On Engineering and Applied Science, Eas 2012. 49-55. DOI: 10.2316/P.2012.785-104  0.343
2012 Asaduzzaman A, Gunasekara GH. A way cache locking scheme supported by knowledge based smart preload effective for low-power multicore electronics Journal of Low Power Electronics. 8: 552-564. DOI: 10.1166/Jolpe.2012.1215  0.531
2011 Asaduzzaman A, Sibai FN. On the design of multicore architectures guided by a miss table at level-1 and level-2 caches to improve predictability and performance/power ratio Multicore Hardware-Software Design and Verification Techniques. 19-32. DOI: 10.2174/978160805225711101010019  0.469
2011 Asaduzzaman A, Hassan W, Koivisto D. Multicore distributed processing architecture with Miss Table in radar systems for real-time severe weather analysis Ieee National Radar Conference - Proceedings. 267-270. DOI: 10.1109/RADAR.2011.5960541  0.381
2011 Asaduzzaman A, Sibai FN, Abonamah A. A dynamic way cache locking scheme to improve the predictability of power-aware embedded systems 2011 18th Ieee International Conference On Electronics, Circuits, and Systems, Icecs 2011. 756-759. DOI: 10.1109/ICECS.2011.6122384  0.472
2011 Asaduzzaman A. An effective level-1 cache locking strategy for energy-efficient real-time multicore systems 14th International Conference On Computer and Information Technology, Iccit 2011. 18-23. DOI: 10.1109/ICCITechn.2011.6164803  0.51
2011 Asaduzzaman A. An efficient memory block selection strategy to improve the performance of cache memory subsystem 14th International Conference On Computer and Information Technology, Iccit 2011. 12-17. DOI: 10.1109/ICCITechn.2011.6164798  0.465
2010 Rani M, Asaduzzaman A. Power aware design of second level cache for multicore embedded systems Conference Proceedings - Ieee Southeastcon. 17-20. DOI: 10.1109/SECON.2010.5453931  0.485
2010 Asaduzzaman A, Rani M, Sibai FN. On the design of low-power cache memories for homogeneous multi-core processors Proceedings of the International Conference On Microelectronics, Icm. 387-390. DOI: 10.1109/ICM.2010.5696168  0.409
2010 Asaduzzaman A, Mahgoub I, Sibai FN. Evaluation of the impact of Miss Table and victim caches in parallel embedded systems Proceedings of the International Conference On Microelectronics, Icm. 144-147. DOI: 10.1109/ICM.2010.5696100  0.673
2010 Asaduzzaman A, Sibai FN. Investigating cache parameters and locking in predictable and low power embedded systems Proceedings of the International Conference On Microelectronics, Icm. 140-143. DOI: 10.1109/ICM.2010.5696094  0.474
2010 Rani MS, Mridha MF, Asaduzzaman AS. Investigating the impact of multimedia applications on multicore cache memory subsystems Icece 2010 - 6th International Conference On Electrical and Computer Engineering. 690-693. DOI: 10.1109/ICELCE.2010.5700787  0.518
2010 Asaduzzaman A, Sibai FN, Rani M. Improving cache locking performance of modern embedded systems via the addition of a miss table at the L2 cache level Journal of Systems Architecture. 56: 151-162. DOI: 10.1016/J.Sysarc.2010.02.002  0.56
2009 Asaduzzaman A, Sibai FN. Performance and energy consumption optimization by tuning level-2 cache attributes for real-time signal processing systems Conference Proceedings - Ieee Southeastcon. 398-403. DOI: 10.1109/SECON.2009.5174113  0.398
2009 Asaduzzaman A, Mahgoub I, Sibai FN. Impact of L1 entire locking and L2 way locking on the performance, power consumption, and predictability of multicore real-time systems 2009 Ieee/Acs International Conference On Computer Systems and Applications, Aiccsa 2009. 705-711. DOI: 10.1109/AICCSA.2009.5069404  0.591
2009 Asaduzzaman A, Sibai FN, Rani M. Impact of level-2 cache sharing on the performance and power requirements of homogeneous multicore embedded systems Microprocessors and Microsystems. 33: 388-397. DOI: 10.1016/J.Micpro.2009.06.001  0.521
2009 Asaduzzaman A, Rani M, Koivisto D. Level-2 shared cache versus level-2 dedicated cache for homogeneous multicore embedded systems Imeti 2009 - 2nd International Multi-Conference On Engineering and Technological Innovation, Proceedings. 3: 10-15.  0.449
2008 Asaduzzaman A, Limbachiya N, Mahgoub I, Sibai FN. Evaluation of I-Cache locking technique for real-time embedded systems Innovations'07: 4th International Conference On Innovations in Information Technology, Iit. 342-346. DOI: 10.1109/IIT.2007.4430406  0.647
2008 Asaduzzaman A, Rani M, Koivisto D. Modeling multicore distributed systems and evaluation of performance, power, and predictability using visualsim Huntsville Simulation Conference, Hsc 2008.  0.435
2008 Rani M, Asaduzzaman A, Koivisto D. Simulation of level-2 cache locking in multicore parallel computing systems Proceedings of the Iasted International Conference On Parallel and Distributed Computing and Systems. 336-341.  0.492
2007 Asaduzzaman A, Rani M, Koivisto D. Impacts of level-2 cache on performance of multimedia systems and applications Sigmap 2007 - International Conference On Signal Processing and Multimedia Applications, Proceedings. 342-347.  0.458
2006 Asaduzzaman A, Mahgoub I. Cache modeling and optimization for portable devices running MPEG-4 video decoder Multimedia Tools and Applications. 28: 239-256. DOI: 10.1007/S11042-006-6145-Y  0.663
2006 Asaduzzaman A, Mahgoub I. Cache optimization for embedded systems running H.264/AVC video decoder Ieee International Conference On Computer Systems and Applications, 2006. 2006: 665-672.  0.644
2004 Asaduzzaman A, Mahgoub I, Sanigepalli P, Kalva H, Shankar R, Furht B. Cache optimization for mobile devices running multimedia applications Proceedings - Ieee Sixth International Symposium On Multimedia Software Engineering, Mse 2004. 499-505. DOI: 10.1109/MMSE.2004.34  0.678
2000 Mahgoub I, Yousif M, Asaduzzaman A. Evaluation of memory latency in cluster-based cache-coherent multiprocessor systems with different interconnection topologies Computers and Electrical Engineering. 26: 207-220. DOI: 10.1016/S0045-7906(99)00042-7  0.607
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