Pedro C. Diniz - Publications

Affiliations: 
Computer Science University of Southern California, Los Angeles, CA, United States 
Area:
Computer Science

70 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Junior CAOdS, Bispo J, Cardoso JMP, Diniz PC, Marques E. Exploration of FPGA-Based Hardware Designs for QR Decomposition for Solving Stiff ODE Numerical Methods Using the HARP Hybrid Architecture Electronics. 9: 843. DOI: 10.3390/Electronics9050843  0.444
2018 Rosa LdS, Dasu A, Diniz PC, Bonato V. A Faddeev Systolic Array for EKF-SLAM and its Arithmetic Data Representation Impact on FPGA Journal of Signal Processing Systems. 90: 357-369. DOI: 10.1007/S11265-017-1243-9  0.475
2018 Hukerikar S, Teranishi K, Diniz PC, Lucas RF. RedThreads: An Interface for Application-Level Fault Detection/Correction Through Adaptive Redundant Multithreading International Journal of Parallel Programming. 46: 225-251. DOI: 10.1007/S10766-017-0492-3  0.393
2016 Silva B, Delbem A, Bonato V, Diniz PC. Runtime mapping and scheduling for energy efficiency in heterogeneous multi-core systems 2015 International Conference On Reconfigurable Computing and Fpgas, Reconfig 2015. DOI: 10.1109/ReConFig.2015.7393355  0.398
2015 Silva BA, Cuminato LA, Bonato V, Diniz PC. Run-time cache configuration for the LEON-3 embedded processor Proceedings, Sbcci 2015 - 28th Symposium On Integrated Circuits and Systems Design: Chip in Bahia. DOI: 10.1145/2800986.2801026  0.309
2015 Park J, Diniz PC. Program-invariant checking for soft-error detection using reconfigurable hardware Acm Transactions On Reconfigurable Technology and Systems. 9. DOI: 10.1145/2751563  0.326
2015 Diniz PC. Atomic-delayed execution: A concurrent programming model for incomplete graph-based computations 2015 Ieee High Performance Extreme Computing Conference, Hpec 2015. DOI: 10.1109/HPEC.2015.7322468  0.316
2015 de Abreu Silva B, Cuminato LA, Delbem ACB, Diniz PC, Bonato V. Application-oriented cache memory configuration for energy efficiency in multi-cores Iet Computers and Digital Techniques. 9: 73-81. DOI: 10.1049/Iet-Cdt.2014.0091  0.462
2015 Cardoso JMP, Coutinho JGF, Carvalho T, Diniz PC, Petrov Z, Luk W, Gonçalves F. Performance-driven instrumentation and mapping strategies using the LARA aspect-oriented programming approach Software - Practice and Experience. DOI: 10.1002/Spe.2301  0.433
2014 Santos AC, Cardoso JMP, Diniz PC, Ferreira DR, Petrov Z. Specifying dynamic adaptations for embedded applications using a dsl Ieee Embedded Systems Letters. 6: 49-52. DOI: 10.1109/Les.2014.2321325  0.427
2014 Santos AC, Cardoso JMP, Diniz PC, Ferreira DR, Petrov Z. A DSL for specifying run-time adaptations for embedded systems: an application to vehicle stereo navigation Journal of Supercomputing. 70: 1218-1248. DOI: 10.1007/S11227-014-1192-Z  0.4
2014 Park J, Diniz PC. Evaluating high-level program invariants using reconfigurable hardware Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 8405: 121-132. DOI: 10.1007/978-3-319-05960-0_11  0.358
2013 Bispo J, Pinto P, Nobre R, Carvalho T, Cardoso JMP, Diniz PC. The MATISSE MATLAB compiler: A MATrix(MATLAB)-aware compiler InfraStructure for embedded computing SystEms Ieee International Conference On Industrial Informatics (Indin). 602-608. DOI: 10.1109/INDIN.2013.6622952  0.365
2013 Hukerikar S, Diniz PC, Lucas RF. Robust graph traversal: Resiliency techniques for data intensive supercomputing 2013 Ieee High Performance Extreme Computing Conference, Hpec 2013. DOI: 10.1109/HPEC.2013.6670340  0.358
2013 Cardoso JMP, Carvalho T, Coutinho JGF, Nobre R, Nane R, Diniz PC, Petrov Z, Luk W, Bertels K. Controlling a complete hardware synthesis toolchain with LARA aspects Microprocessors and Microsystems. 37: 1073-1089. DOI: 10.1016/J.Micpro.2013.06.001  0.477
2013 Coutinho JGF, Cardoso JMP, Carvalho T, Nobre R, Bhattacharya S, Diniz PC, Fitzpatrick L, Nane R. Deriving resource efficient designs using the REFLECT aspect-oriented approach (extended abstract) Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 7806: 226-228. DOI: 10.1007/978-3-642-36812-7_29  0.329
2013 Diniz PC, Cardoso JMP, José JG, Petrov Z. Introduction Compilation and Synthesis For Embedded Reconfigurable Systems: An Aspect-Oriented Approach. 1-11. DOI: 10.1007/978-1-4614-4894-5-1  0.317
2013 Cardoso JMP, Diniz PC, De Figueiredo Coutinho JG, Petrov ZM. Compilation and synthesis for embedded reconfigurable systems: An aspect-oriented approach Compilation and Synthesis For Embedded Reconfigurable Systems: An Aspect-Oriented Approach. 1-203. DOI: 10.1007/978-1-4614-4894-5  0.401
2012 Cardoso JMP, Carvalho T, Coutinho JGF, Luk W, Nobre R, Diniz PC, Petrov Z. LARA: An aspect-oriented programming language for embedded systems Aosd'12 - Proceedings of the 11th Annual International Conference On Aspect Oriented Software Development. 179-190. DOI: 10.1145/2162049.2162071  0.397
2012 Cardoso JMP, Carvalho T, Teixeira J, Diniz PC, Goncalves F, Petrov Z. Hardware/software specialization through aspects: The LARA approach Proceedings - 2012 International Conference On Embedded Computer Systems: Architectures, Modeling and Simulation, Ic-Samos 2012. 260-267. DOI: 10.1109/SAMOS.2012.6404183  0.366
2012 Abramson J, Diniz PC. Resiliency-aware Scheduling for reconfigurable VLIW processors 2012 International Conference On Reconfigurable Computing and Fpgas, Reconfig 2012. DOI: 10.1109/ReConFig.2012.6416784  0.602
2012 Coutinho JGF, Bhattacharya S, Luk W, Constantinides GA, Cardoso JMP, Carvalho T, Diniz PC, Petrov Z. Resource-efficient designs using an aspect-oriented approach Proceedings - 15th Ieee International Conference On Computational Science and Engineering, Cse 2012 and 10th Ieee/Ifip International Conference On Embedded and Ubiquitous Computing, Euc 2012. 399-406. DOI: 10.1109/ICCSE.2012.62  0.379
2012 Abramson J, Diniz PC. Resiliency-aware scheduling: Resource allocation for hardened computation on configurable devices Fpt 2012 - 2012 International Conference On Field-Programmable Technology. 129-134. DOI: 10.1109/FPT.2012.6412124  0.566
2012 Abramson J, Diniz PC. A resiliency-aware scheduling approach for FPGA configuration: Preliminary results Proceedings - 22nd International Conference On Field Programmable Logic and Applications, Fpl 2012. 471-472. DOI: 10.1109/FPL.2012.6339196  0.582
2012 Cardoso JMP, Teixeira J, Alves JC, Nobre R, Diniz PC, Coutinho JGF, Luk W. Specifying compiler strategies for FPGA-based systems Proceedings of the 2012 Ieee 20th International Symposium On Field-Programmable Custom Computing Machines, Fccm 2012. 192-199. DOI: 10.1109/FCCM.2012.41  0.427
2012 Cardoso JMP, Carvalho T, Coutinho JGF, Diniz PC, Petrov Z, Luk W. Controlling hardware synthesis with aspects Proceedings - 15th Euromicro Conference On Digital System Design, Dsd 2012. 226-233. DOI: 10.1109/DSD.2012.33  0.345
2011 Demertzi M, Diniz PC, Hall MW, Gilbert AC, Wang Y. Domain-specific optimization of signal recognition targeting FPGAs Acm Transactions On Reconfigurable Technology and Systems. 4. DOI: 10.1145/1968502.1968508  0.481
2011 Alves JC, Diniz PC. Custom FPGA-based micro-architecture for streaming computing Proceedings of the 2011 7th Southern Conference On Programmable Logic, Spl 2011. 51-56. DOI: 10.1109/SPL.2011.5782624  0.473
2011 Park J, Diniz PC. Data reorganization and prefetching of pointer-based data structures Ieee Design and Test of Computers. 28: 38-46. DOI: 10.1109/Mdt.2011.45  0.624
2011 Petrov Z, Kratky K, Cardoso JMP, Diniz PC. Programming safety requirements in the REFLECT design flow Ieee International Conference On Industrial Informatics (Indin). 841-847. DOI: 10.1109/INDIN.2011.6035002  0.346
2011 Sato M, Barthou D, Diniz PC, Saddayapan P. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Introduction Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6852: 267-268. DOI: 10.1007/978-3-642-23400-2_25  0.404
2011 Diniz PC, Cardoso JMP. Code transformations for embedded reconfigurable computing architectures Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6491: 322-344. DOI: 10.1007/978-3-642-18023-1_8  0.344
2010 Cardoso JMP, Diniz PC, Weinhardt M. Compiling for reconfigurable computing: A survey Acm Computing Surveys. 42: 13. DOI: 10.1145/1749603.1749604  0.48
2010 Diniz PC, Danelutto M, Barthou D, Gonzales M, Hübner M. High performance architectures and compilers Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6271: 254-255. DOI: 10.1007/978-3-642-15277-1_24  0.421
2008 Baradaran N, Diniz PC. A compiler approach to managing storage and memory bandwidth in configurable architectures Acm Transactions On Design Automation of Electronic Systems. 13. DOI: 10.1145/1391962.1391969  0.75
2008 Cardoso JMP, Diniz PC. IJE special issue on reconfigurable hardware systems International Journal of Electronics. 95: 601-602. DOI: 10.1080/00207210801924461  0.534
2008 Park J, Diniz PC. Partial data reuse for nested loop computations: Design space exploration for FPGA implementations International Journal of Electronics. 95: 705-723. DOI: 10.1080/00207210801924396  0.655
2007 Rodrigues R, Cardoso JMP, Diniz PC. A data-driven approach for pipelining sequences of data-dependent loops Proceedings 2007 Ieee Symposium On Field-Programme Custom Computing Machines, Fccm 2007. 219-228. DOI: 10.1109/FCCM.2007.16  0.326
2007 Baradaran N, Diniz PC. Exploiting parallelism in configurable architectures through custom array mapping Iet Computers and Digital Techniques. 1: 303-311. DOI: 10.1049/Iet-Cdt:20060181  0.745
2007 Park J, Diniz PC. Partial data reuse for windowing computations: Performance modeling for FPGA implementations Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4419: 97-109.  0.464
2006 Diniz PC, Govindu G. Design of a field-programmable dual-precision floating-point arithmetic unit Proceedings - 2006 International Conference On Field Programmable Logic and Applications, Fpl. 733-736. DOI: 10.1109/FPL.2006.311302  0.345
2006 Baradaran N, Diniz PC. Memory parallelism using custom array mapping to heterogeneous storage structures Proceedings - 2006 International Conference On Field Programmable Logic and Applications, Fpl. 383-388. DOI: 10.1109/FPL.2006.311241  0.732
2006 Ziegler HE, Malusare PL, Diniz PC. Array replication to increase parallelism in applications mapped to configurable architectures Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 4339: 62-75. DOI: 10.1007/978-3-540-69330-7_5  0.486
2005 Baradaran N, Diniz PC. Compiler-directed design space exploration for caching and prefetching data in high-level synthesis Proceedings - 2005 Ieee International Conference On Field Programmable Technology. 2005: 233-240. DOI: 10.1109/FPT.2005.1568552  0.727
2005 Diniz PC. Evaluation of code generation strategies for scalar replaced codes in fine-grain configurable architectures Proceedings - 13th Annual Ieee Symposium On Field-Programmable Custom Computing Machines, Fccm 2005. 2005: 73-82. DOI: 10.1109/FCCM.2005.32  0.441
2005 Baradaran N, Diniz PC. A register allocation algorithm in the presence of scalar replacement for fine-grain configurable architectures Proceedings -Design, Automation and Test in Europe, Date '05. 6-11. DOI: 10.1109/DATE.2005.35  0.686
2005 Diniz PC, Hall MW, Park J, So B, Ziegler HE. Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system Microprocessors and Microsystems. 29: 51-62. DOI: 10.1016/J.Micpro.2004.06.007  0.646
2005 Lee YJ, Diniz PC, Hall MW, Lucas R. Empirical optimization for a sparse linear solver: A case study International Journal of Parallel Programming. 33: 165-181. DOI: 10.1007/S10766-005-3581-7  0.413
2005 Diniz PC, Liu B. Selector: A language construct for developing dynamic applications Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2481: 218-232. DOI: 10.1007/11596110_15  0.414
2005 Baradaran N, Diniz PC, Park J. Extending the applicability of scalar replacement to multiple induction variables Lecture Notes in Computer Science. 3602: 455-469.  0.681
2004 Diniz PC. Design space exploration for configurable architectures and the role of modeling, high-level program analysis and learning techniques Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3133: 213-223.  0.387
2004 Baradaran N, Park J, Diniz PC. Compiler reuse analysis for the mapping of data in FPGAs with RAM blocks Proceedings - 2004 Ieee International Conference On Field-Programmable Technology, Fpt '04. 145-152.  0.718
2004 Baradaran N, Park J, Diniz PC. Data reuse in configurable architectures with RAM blocks Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3203: 1113-1115.  0.665
2003 Rinard MC, Diniz PC. Eliminating Synchronization Bottlenecks Using Adaptive Replication Acm Transactions On Programming Languages and Systems. 25: 316-359. DOI: 10.1145/641909.641911  0.312
2003 Shesha Shayee KR, Park J, Diniz PC. Performance and area modeling of complete FPGA designs in the presence of loop transformations Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2778: 313-323. DOI: 10.1109/Tc.2004.101  0.494
2003 Park J, Diniz PC. Synthesis and estimation of memory interfaces for FPGA-based reconfigurable computing engines Ieee Symposium On Fpgas For Custom Computing Machines, Proceedings. 2003: 297-299. DOI: 10.1109/FPGA.2003.1227279  0.39
2003 Diniz PC, Park J. Data search and reorganization using FPGAs: Application to spatial pointer-based data structures Ieee Symposium On Fpgas For Custom Computing Machines, Proceedings. 2003: 207-217. DOI: 10.1109/FPGA.2003.1227256  0.421
2003 Ziegler HE, Hall MW, Diniz PC. Compiler-generated communication for pipelined FPGA applications Proceedings - Design Automation Conference. 610-615.  0.356
2003 So B, Diniz PC, Hall MW. Using estimates from behavioral synthesis tools in compiler-directed design space exploration Proceedings - Design Automation Conference. 514-519.  0.31
2002 Ziegler H, So B, Hall M, Diniz PC. Coarse-grain pipelining on multiple FPGA architectures Ieee Symposium On Fpgas For Custom Computing Machines, Proceedings. 2002: 77-88. DOI: 10.1109/FPGA.2002.1106663  0.501
2002 So B, Hall MW, Diniz PC. A compiler approach to fast hardware design space exploration in FPGA-based systems Proceedings of the Acm Sigplan Conference On Programming Language Design and Implementation (Pldi). 165-176.  0.358
2002 Diniz PC, Park J. Data reorganization engines for the next generation of system-on-a-chip FPGAs Acm/Sigda International Symposium On Field Programmable Gate Arrays - Fpga. 237-244.  0.435
2001 Park J, Diniz PC. Synthesis of pipelined memory access controllers for streamed data applications on FPGA-based computing engines Proceedings of the International Symposium On System Synthesis. 221-226.  0.391
1999 Diniz PC, Rinard MC. Eliminating synchronization overhead in automatically parallelized programs using dynamic feedback Acm Transactions On Computer Systems. 17: 89-132. DOI: 10.1145/312203.312210  0.352
1999 Diniz PC, Rinard MC. Synchronization transformations for parallel computing Concurrency Practice and Experience. 11: 773-802. DOI: 10.1002/(Sici)1096-9128(199911)11:13<773::Aid-Cpe453>3.0.Co;2-5  0.411
1998 Diniz PC, Rinard MC. Lock Coarsening: Eliminating Lock Overhead in Automatically Parallelized Object-Based Programs Journal of Parallel and Distributed Computing. 49: 218-244. DOI: 10.1006/Jpdc.1998.1441  0.44
1997 Rinard MC, Diniz PC. Commutativity Analysis: A New Analysis Technique for Parallelizing Compilers Acm Transactions On Programming Languages and Systems. 19: 942-991. DOI: 10.1145/267959.269969  0.462
1997 Ibarra OH, Diniz PC, Rinard MC. On the Complexity of Commutativity Analysis International Journal of Foundations of Computer Science. 8: 81-94. DOI: 10.1142/S0129054197000069  0.405
1996 Rinard MC, Diniz PC. Commutativity analysis: A new analysis framework for parallelizing compilers Sigplan Notices (Acm Special Interest Group On Programming Languages). 31: 54-67.  0.39
1996 Rinard MC, Diniz PC. Semantic foundations of commutativity analysis Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 1123: 414-423.  0.334
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