Hailin Jiang, D.Eng. - Publications
Affiliations: | 2007 | Electrical & Computer Engineering | University of California, Santa Barbara, Santa Barbara, CA, United States |
Area:
Electronics and Electrical EngineeringYear | Citation | Score | |||
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2005 | Wang K, Ran Y, Jiang H, Marek-Sadowska M. General skew constrained clock network sizing based on sequential linear programming Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 773-781. DOI: 10.1109/Tcad.2005.846362 | 0.381 | |||
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