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Saraju P. Mohanty, Ph.D. - Publications

Affiliations: 
1991-1995 Electrical Engineering Orissa University of Agriculture and Technology 
 1997-1999 Electrical Engineering Indian Institute of Science Bangalore 
 2000-2003 Computer Science and Engineering University of South Florida, Tampa, FL, United States 
 2003- Computer Science and Engineering University of North Texas, Denton, TX, United States 
Area:
Security and Energy Aware Internet-of-Things (IoT), IoT-enabled Solutions for Smart Healthcare, Consumer Electronics for Smart Cities
Website:
http://www.smohanty.org/
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Year Citation  Score
2024 Bathalapalli VKVV, Mohanty SP, Kougianos E, Iyer V, Rout B. PUFchain 3.0: Hardware-Assisted Distributed Ledger for Robust Authentication in Healthcare Cyber-Physical Systems. Sensors (Basel, Switzerland). 24. PMID 38339656 DOI: 10.3390/s24030938  0.57
2023 Alkhodair A, Mohanty SP, Kougianos E. FlexiChain 3.0: Distributed Ledger Technology-Based Intelligent Transportation for Vehicular Digital Asset Exchange in Smart Cities. Sensors (Basel, Switzerland). 23. PMID 37112453 DOI: 10.3390/s23084114  0.586
2022 Vangipuram SLT, Mohanty SP, Kougianos E, Ray C. G-DaM: A Distributed Data Storage with Blockchain Framework for Management of Groundwater Quality Data. Sensors (Basel, Switzerland). 22. PMID 36433322 DOI: 10.3390/s22228725  0.553
2022 Vangipuram SLT, Mohanty SP, Kougianos E, Ray C. agroString: Visibility and Provenance through a Private Blockchain Platform for Agricultural Dispense towards Consumers. Sensors (Basel, Switzerland). 22. PMID 36365923 DOI: 10.3390/s22218227  0.554
2022 Bathalapalli VKVV, Mohanty SP, Kougianos E, Baniya BK, Rout B. PUFchain 2.0: Hardware-Assisted Robust Blockchain for Sustainable Simultaneous Device and Data Security in Smart Healthcare. Sn Computer Science. 3: 344. PMID 35755326 DOI: 10.1007/s42979-022-01238-2  0.588
2021 Vangipuram SLT, Mohanty SP, Kougianos E. CoviChain: A Blockchain Based Framework for Nonrepudiable Contact Tracing in Healthcare Cyber-Physical Systems During Pandemic Outbreaks. Sn Computer Science. 2: 346. PMID 34179827 DOI: 10.1007/s42979-021-00746-x  0.525
2020 Rachakonda L, Mohanty SP, Kougianos E. iLog: An Intelligent Device for Automatic Food Intake Monitoring and Stress Detection in the IoMT Ieee Transactions On Consumer Electronics. 66: 115-124. DOI: 10.1109/Tce.2020.2976006  0.582
2020 Puthal D, Mohanty SP, Kougianos E, Das G. When Do We Need the Blockchain Ieee Consumer Electronics Magazine. 1-1. DOI: 10.1109/Mce.2020.3015606  0.541
2020 Nath RK, Thapliyal H, Caban-Holt A, Mohanty SP. Machine Learning Based Solutions for Real-Time Stress Monitoring Ieee Consumer Electronics Magazine. 9: 34-41. DOI: 10.1109/Mce.2020.2993427  0.566
2020 Tripathy AK, Mohapatra AG, Mohanty SP, Kougianos E, Joshi AM, Das G. EasyBand: A Wearable for Safety-Aware Mobility During Pandemic Outbreak Ieee Consumer Electronics Magazine. 9: 57-61. DOI: 10.1109/Mce.2020.2992034  0.557
2020 Mohanty SP. Security and Privacy by Design is Key in the Internet of Everything (IoE) Era Ieee Consumer Electronics Magazine. 9: 4-5. DOI: 10.1109/Mce.2019.2954959  0.355
2020 Gedeon IJ, Snively P, Frey C, Almuhtadi W, Mohanty SP. Privacy and Security by Design Ieee Consumer Electronics Magazine. 9: 76-77. DOI: 10.1109/Mce.2019.2954762  0.36
2020 Mohanty SP, Yanambaka VP, Kougianos E, Puthal D. PUFchain: A Hardware-Assisted Blockchain for Sustainable Simultaneous Device and Data Security in the Internet of Everything (IoE) Ieee Consumer Electronics Magazine. 9: 8-16. DOI: 10.1109/Mce.2019.2953758  0.79
2020 Biswas S, Sharif K, Li F, Maharjan S, Mohanty SP, Wang Y. PoBT: A Lightweight Consensus Algorithm for Scalable IoT Business Blockchain Ieee Internet of Things Journal. 7: 2343-2355. DOI: 10.1109/Jiot.2019.2958077  0.37
2019 Rachakonda L, Mohanty SP, Kougianos E, Sundaravadivel P. Stress-Lysis: A DNN-Integrated Edge Device for Stress Level Detection in the IoMT Ieee Transactions On Consumer Electronics. 65: 474-483. DOI: 10.1109/Tce.2019.2940472  0.765
2019 Yanambaka VP, Mohanty SP, Kougianos E, Puthal D. PMsec: Physical Unclonable Function-Based Robust and Lightweight Authentication in the Internet of Medical Things Ieee Transactions On Consumer Electronics. 65: 388-397. DOI: 10.1109/Tce.2019.2926192  0.798
2019 Sayeed MA, Mohanty SP, Kougianos E, Zaveri HP. eSeiz: An Edge-Device for Accurate Seizure Detection for Smart Healthcare Ieee Transactions On Consumer Electronics. 65: 379-387. DOI: 10.1109/Tce.2019.2920068  0.586
2019 Sayeed MA, Mohanty SP, Kougianos E, Zaveri HP. Neuro-Detect: A Machine Learning-Based Fast and Accurate Seizure Detection System in the IoMT Ieee Transactions On Consumer Electronics. 65: 359-368. DOI: 10.1109/Tce.2019.2917895  0.556
2019 Mohanty SP. Smart Consumer Electronic Systems Ieee Potentials. 38: 6-7. DOI: 10.1109/Mpot.2018.2850539  0.31
2019 Kumar N, Puthal D, Theocharides T, Mohanty SP. Unmanned Aerial Vehicles in Consumer Applications: New Applications in Current and Future Smart Environments Ieee Consumer Electronics Magazine. 8: 66-67. DOI: 10.1109/Mce.2019.2892278  0.336
2018 Zhao Z, Srivastava A, Peng L, Mohanty SP. A Multiple Input Floating Gate Based Arithmetic Logic Unit with a Feedback Loop for Digital Calibration Journal of Low Power Electronics. 14: 535-547. DOI: 10.1166/Jolpe.2018.1585  0.306
2018 Yanambaka VP, Mohanty SP, Kougianos E. Making Use of Manufacturing Process Variations: A Dopingless Transistor Based-PUF for Hardware-Assisted Security Ieee Transactions On Semiconductor Manufacturing. 31: 285-294. DOI: 10.1109/Tsm.2018.2818180  0.83
2018 Sundaravadivel P, Kesavan K, Kesavan L, Mohanty SP, Kougianos E. Smart-Log: A Deep-Learning Based Automated Nutrition Monitoring System in the IoT Ieee Transactions On Consumer Electronics. 64: 390-398. DOI: 10.1109/Tce.2018.2867802  0.775
2018 Sengupta A, Roy D, Mohanty SP, Corcoran P. Low-Cost Obfuscated JPEG CODEC IP Core for Secure CE Hardware Ieee Transactions On Consumer Electronics. 64: 365-374. DOI: 10.1109/Tce.2018.2852265  0.441
2018 Sengupta A, Mohanty SP, Pescador F, Corcoran P. Multi-Phase Obfuscation of Fault Secured DSP Designs With Enhanced Security Feature Ieee Transactions On Consumer Electronics. 64: 356-364. DOI: 10.1109/Tce.2018.2852264  0.353
2018 Mohanty SP, Huebner M, Xue CJ, Li X, Li H. Guest Editorial Circuit and System Design Automation for Internet of Things Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 3-6. DOI: 10.1109/Tcad.2017.2779960  0.473
2018 Sengupta A, Roy D, Mohanty SP. Triple-Phase Watermarking for Reusable IP Core Protection During Architecture Synthesis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 742-755. DOI: 10.1109/Tcad.2017.2729341  0.33
2018 Puthal D, Malik N, Mohanty SP, Kougianos E, Das G. Everything You Wanted to Know About the Blockchain: Its Promise, Components, Processes, and Problems Ieee Consumer Electronics Magazine. 7: 6-14. DOI: 10.1109/Mce.2018.2816299  0.577
2018 Roy SS, Puthal D, Sharma S, Mohanty SP, Zomaya AY. Building a Sustainable Internet of Things: Energy-Efficient Routing Using Low-Power Sensors Will Meet the Need Ieee Consumer Electronics Magazine. 7: 42-49. DOI: 10.1109/Mce.2017.2776462  0.301
2018 Puthal D, Malik N, Mohanty SP, Kougianos E, Yang C. The Blockchain as a Decentralized Security Framework [Future Directions] Ieee Consumer Electronics Magazine. 7: 18-21. DOI: 10.1109/Mce.2017.2776459  0.589
2018 Sundaravadivel P, Kougianos E, Mohanty SP, Ganapathiraju MK. Everything You Wanted to Know about Smart Health Care: Evaluating the Different Technologies and Components of the Internet of Things for Better Health Ieee Consumer Electronics Magazine. 7: 18-28. DOI: 10.1109/Mce.2017.2755378  0.757
2018 Thapliyal H, Kumar Nath R, Mohanty SP. Smart Home Environment for Mild Cognitive Impairment Population: Solutions to Improve Care and Quality of Life Ieee Consumer Electronics Magazine. 7: 68-76. DOI: 10.1109/Mce.2017.2755340  0.549
2018 Mohanty SP, Kougianos E, Guturu P. SBPG: Secure Better Portable Graphics for Trustworthy Media Communications in the IoT Ieee Access. 6: 5939-5953. DOI: 10.1109/Access.2018.2795478  0.65
2018 Sengupta A, Roy D, Mohanty SP, Corcoran P. A Framework for Hardware Efficient Reusable IP Core for Grayscale Image CODEC Ieee Access. 6: 871-882. DOI: 10.1109/Access.2017.2776293  0.312
2018 Sengupta AS, Mohanty SP, Bhattacharyya BK. DC–DC buck converter solely powered by supercapacitors for efficiently powering the hand-held devices Iet Power Electronics. 11: 1946-1954. DOI: 10.1049/Iet-Pel.2017.0488  0.364
2018 Zhao Z, Srivastava A, Peng L, Mohanty SP. Calibration method to reduce the error in logarithmic conversion with its circuit implementation Iet Circuits, Devices & Systems. 12: 301-308. DOI: 10.1049/Iet-Cds.2017.0315  0.406
2017 Sarkar M, Ghosal P, Mohanty SP. Exploring the Feasibility of a DNA Computer: Design of an ALU using Sticker Based DNA Model. Ieee Transactions On Nanobioscience. PMID 28715334 DOI: 10.1109/Tnb.2017.2726682  0.379
2017 Todri-Sanial A, Mohanty SP, Comte M, Belleville M. Guest Editorial Special Issue on Nanoelectronic Circuit and System Design Methods for the Mobile Computing Era Acm Journal On Emerging Technologies in Computing Systems. 13: 12. DOI: 10.1145/3003370  0.396
2017 Yanambaka VP, Mohanty SP, Kougianos E, Ghai D, Ghai G. Process Variation Analysis and Optimization of a FinFET-Based VCO Ieee Transactions On Semiconductor Manufacturing. 30: 126-134. DOI: 10.1109/Tsm.2017.2669314  0.812
2017 MOHANTY SP, LI X, LI H, CAO Y. Guest Editorial Special Issue on Nanoelectronic Devices and Circuits for Next Generation Sensing and Information Processing Ieee Transactions On Nanotechnology. 16: 383-386. DOI: 10.1109/Tnano.2017.2680420  0.416
2017 Sengupta A, Roy D, Mohanty SP, Corcoran P. DSP design protection in CE through algorithmic transformation based structural obfuscation Ieee Transactions On Consumer Electronics. 63: 467-476. DOI: 10.1109/Tce.2017.015072  0.434
2017 Sengupta A, Bhadauria S, Mohanty SP. TL-HLS: Methodology for Low Cost Hardware Trojan Security Aware Scheduling With Optimal Loop Unrolling Factor During High Level Synthesis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 655-668. DOI: 10.1109/Tcad.2016.2597232  0.382
2017 Joshi S, Mohanty SP, Kougianos E. Everything You Wanted to Know About PUFs Ieee Potentials. 36: 38-46. DOI: 10.1109/Mpot.2015.2490261  0.677
2017 Yang C, Puthal D, Mohanty SP, Kougianos E. Big-Sensing-Data Curation for the Cloud is Coming: A Promise of Scalable Cloud-Data-Center Mitigation for Next-Generation IoT and Wireless Sensor Networks Ieee Consumer Electronics Magazine. 6: 48-56. DOI: 10.1109/Mce.2017.2714695  0.598
2017 Mohanty SP, Sengupta A, Guturu P, Kougianos E. Everything You Want to Know About Watermarking: From Paper Marks to Hardware Protection: From paper marks to hardware protection. Ieee Consumer Electronics Magazine. 6: 83-91. DOI: 10.1109/Mce.2017.2684980  0.626
2017 Mohanty SP. Deep Learning Can Be Crucial for Smart Consumer Electronics [Notes from the Editor] Ieee Consumer Electronics Magazine. 6: 3-4. DOI: 10.1109/Mce.2016.2640418  0.339
2017 Ghosh S, Majumder A, Goswami J, Kumar A, Mohanty SP, Bhattacharyya BK. Swing-Pay: One Card Meets All User Payment and Identity Needs: A Digital Card Module using NFC and Biometric Authentication for Peer-to-Peer Payment Ieee Consumer Electronics Magazine. 6: 82-93. DOI: 10.1109/Mce.2016.2614522  0.317
2017 Sengupta A, Bhadauria S, Mohanty SP. Low-cost security aware HLS methodology Iet Computers & Digital Techniques. 11: 68-79. DOI: 10.1049/Iet-Cdt.2016.0014  0.375
2017 Zhao Z, Srivastava A, Peng L, Chen S, Mohanty SP. A novel switchable pin method for regulating power in chip-multiprocessor Integration. 58: 329-338. DOI: 10.1016/J.Vlsi.2016.11.010  0.423
2017 Yanambaka VP, Mohanty SP, Kougianos E. Making use of semiconductor manufacturing process variations: FinFET-based physical unclonable functions for efficient security integration in the IoT Analog Integrated Circuits and Signal Processing. 93: 429-441. DOI: 10.1007/S10470-017-1053-9  0.827
2016 Panchore M, Singh J, Mohanty SP. Impact of Channel Hot Carrier Effect in Junction-and Doping-Free Devices and Circuits Ieee Transactions On Electron Devices. 63: 5068-5071. DOI: 10.1109/Ted.2016.2619621  0.365
2016 Mohanty SP, Choppali U, Kougianos E. Everything you wanted to know about smart cities Ieee Consumer Electronics Magazine. 5: 60-70. DOI: 10.1109/Mce.2016.2556879  0.584
2016 Rajaram ML, Kougianos E, Mohanty SP, Choppali U. Wireless Sensor Network Simulation Frameworks: A Tutorial Review: MATLAB/Simulink bests the rest Ieee Consumer Electronics Magazine. 5: 63-69. DOI: 10.1109/Mce.2016.2519051  0.6
2016 Zhao Z, Srivastava A, Peng L, Mohanty SP. A low-cost mixed clock generator for high speed adiabatic logic Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 2016: 587-590. DOI: 10.1109/ISVLSI.2016.44  0.377
2016 Albalawi U, Mohanty SP, Kougianos E. Energy-efficient design of the secure better portable graphics compression architecture for trusted image communication in the IoT Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 2016: 302-307. DOI: 10.1109/ISVLSI.2016.21  0.821
2016 Ghosal P, Mohanty SP. Power Minimization of a Memristor-Based Wien Bridge Oscillator through a Simscape Framework Proceedings - 2015 Ieee International Symposium On Nanoelectronic and Information Systems, Inis 2015. 83-88. DOI: 10.1109/iNIS.2015.63  0.327
2016 Albalawi U, Mohanty SP, Kougianos E. A Hardware Architecture for Better Portable Graphics (BPG) Compression Encoder Proceedings - 2015 Ieee International Symposium On Nanoelectronic and Information Systems, Inis 2015. 291-296. DOI: 10.1109/iNIS.2015.12  0.794
2016 Coelho G, Kougianos E, Mohanty SP, Sundaravadivel P, Albalawi U. An IoT-Enabled Modular Quadrotor Architecture for Real-Time Aerial Object Tracking Proceedings - 2015 Ieee International Symposium On Nanoelectronic and Information Systems, Inis 2015. 197-202. DOI: 10.1109/iNIS.2015.10  0.823
2016 Albalawi U, Mohanty SP, Kougianos E. SBPG: A secure better portable graphics compression architecture for high speed trusted image communication in the IoT 2016 17th International Conference On Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Eurosime 2016. DOI: 10.1109/EuroSimE.2016.7463397  0.798
2016 Sundaravadivel P, Mohanty SP, Kougianos E, Albalawi U. An energy efficient sensor for thyroid monitoring through the IoT 2016 17th International Conference On Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Eurosime 2016. DOI: 10.1109/EuroSimE.2016.7463377  0.79
2016 Sengupta A, Mohanty SP, Lombardi F, Zwolinski M. IEEE Access Special Section Editorial: Security and Reliability Aware System Design for Mobile Computing Devices Ieee Access. 4: 2976-2980. DOI: 10.1109/Access.2016.2580465  0.445
2016 Kougianos E, Mohanty SP, Coelho G, Albalawi U, Sundaravadivel P. Design of a High-Performance System for Secure Image Communication in the Internet of Things Ieee Access. 4: 1222-1242. DOI: 10.1109/Access.2016.2542800  0.813
2016 Sarkar M, Ghosal P, Mohanty SP. Minimal reversible circuit synthesis on a DNA computer Natural Computing. 1-10. DOI: 10.1007/S11047-016-9553-6  0.354
2016 Albalawi U, Mohanty SP, Kougianos E. A new region aware invisible robust blind watermarking approach Multimedia Tools and Applications. 76: 21303-21337. DOI: 10.1007/S11042-016-4063-1  0.796
2016 Joshi S, Mohanty SP, Kougianos E. Simscape® based ultra-fast design exploration: graphene-nanoelectronic circuit case studies Analog Integrated Circuits and Signal Processing. 87: 407-420. DOI: 10.1007/S10470-016-0732-2  0.753
2015 Roy D, Ghosal P, Mohanty S. Fuzzroute: A thermally efficient congestion-free global routing method for three-dimensional integrated circuits Acm Transactions On Design Automation of Electronic Systems. 21. DOI: 10.1145/2767127  0.33
2015 Mohanty SP, Kundu S. Guest Editorial: Special Section on Circuit and System Design Methodologies for Emerging Technologies Ieee Transactions On Emerging Topics in Computing. 3: 456-457. DOI: 10.1109/Tetc.2015.2491478  0.387
2015 Joshi S, Kougianos E, Mohanty SP. Simscape based ultra-fast design exploration of graphene-nanoelectronic systems Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 7: 292-296. DOI: 10.1109/ISVLSI.2015.25  0.547
2015 Kougianos E, Joshi S, Mohanty SP. Multi-swarm optimization of a graphene FET based voltage controlled oscillator circuit Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 7: 567-572. DOI: 10.1109/ISVLSI.2015.24  0.568
2015 Mohanty SP, Kougianos E, Yanambaka VP. Ultra-fast variability-aware optimization of mixed-signal designs using bootstrapped kriging Proceedings - International Symposium On Quality Electronic Design, Isqed. 2015: 239-242. DOI: 10.1109/ISQED.2015.7085432  0.609
2015 Kougianos E, Mohanty SP. A nature-inspired firefly algorithm based approach for nanoscale leakage optimal RTL structure Integration, the Vlsi Journal. 51: 46-60. DOI: 10.1016/J.Vlsi.2015.05.004  0.693
2014 Ghai D, Mohanty S, Thakral G, Okobiah O. Variability-aware design of double gate FinFET-based current mirrors Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 347-352. DOI: 10.1145/2591513.2591583  0.829
2014 Agu E, Mohanty S, Kougianos E, Gautam M. Simscape design flow for memristor based programmable oscillators Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 223-224. DOI: 10.1145/2591513.2591545  0.583
2014 Das TS, Ghosal P, Mohanty SP, Kougianos E. A performance enhancing hybrid locally mesh globally star NoC topology Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 69-70. DOI: 10.1145/2591513.2591544  0.588
2014 Okobiah O, Mohanty S, Kougianos E. Fast design optimization through simple kriging metamodeling: A sense amplifier case study Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 932-937. DOI: 10.1109/Tvlsi.2013.2256436  0.842
2014 Mohanty SP, Kougianos E. Incorporating manufacturing process variation awareness in fast design optimization of nanoscale CMOS VCOs Ieee Transactions On Semiconductor Manufacturing. 27: 22-31. DOI: 10.1109/Tsm.2013.2291112  0.699
2014 Ghosh S, Ghosal P, Das N, Mohanty SP, Okobiah O. Data correlation aware serial encoding for low switching power on-chip communication Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 124-129. DOI: 10.1109/ISVLSI.2014.48  0.74
2014 Mohanty SP, Ranganathan N, Bhanja S, Kundu S, Girard P. Message from the general and program chairs Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. xv. DOI: 10.1109/ISVLSI.2014.4  0.423
2014 Okobiah O, Mohanty SP, Kougianos E. Exploring Kriging for fast and accurate design optimization of nanoscale analog circuits Proceedings of Ieee Computer Society Annual Symposium On Vlsi, Isvlsi. 244-247. DOI: 10.1109/ISVLSI.2014.12  0.836
2014 Khan MA, Mohanty SP, Kougianos E. Statistical process variation analysis of a graphene FET based LC-VCO for WLAN applications Proceedings - International Symposium On Quality Electronic Design, Isqed. 569-574. DOI: 10.1109/ISQED.2014.6783377  0.605
2014 Okobiah O, Mohanty SP, Kougianos E. Kriging bootstrapped neural network training for fast and accurate process variation analysis Proceedings - International Symposium On Quality Electronic Design, Isqed. 365-372. DOI: 10.1109/ISQED.2014.6783349  0.808
2014 Ghosh D, Ghosal P, Mohanty SP. A highly parameterizable simulator for performance analysis of NoC architectures Proceedings - 2014 13th International Conference On Information Technology, Icit 2014. 311-315. DOI: 10.1109/ICIT.2014.66  0.357
2014 Okobiah O, Mohanty SP, Kougianos E. Nano-CMOS thermal sensor design optimization for efficient temperature measurement Integration, the Vlsi Journal. 47: 195-203. DOI: 10.1016/J.Vlsi.2013.10.001  0.826
2014 Mohanty SP, Gomathisankaran M, Kougianos E. Variability-aware architecture level optimization techniques for robust nanoscale chip design Computers and Electrical Engineering. 40: 168-193. DOI: 10.1016/J.Compeleceng.2013.11.026  0.719
2014 Mohanty SP, Kougianos E. Polynomial metamodel based fast optimization of nano-CMOS oscillator circuits Analog Integrated Circuits and Signal Processing. 79: 437-453. DOI: 10.1007/S10470-014-0284-2  0.717
2014 Mohanty SP, Kougianos E. Polynomial metamodel-based fast optimization of nanoscale PLL components Lecture Notes in Electrical Engineering. 265: 179-199. DOI: 10.1007/978-3-319-01418-0_11  0.69
2013 Zheng G, Mohanty SP, Kougianos E, Okobiah O. Polynomial metamodel integrated verilog-AMS for memristor-based mixed-signal system design Midwest Symposium On Circuits and Systems. 916-919. DOI: 10.1109/MWSCAS.2013.6674799  0.829
2013 Ghai D, Mohanty SP, Thakral G. Comparative analysis of double gate FinFET configurations for analog circuit design Midwest Symposium On Circuits and Systems. 809-812. DOI: 10.1109/MWSCAS.2013.6674772  0.789
2013 Okobiah O, Mohanty SP, Kougianos E. Fast statistical process variation analysis using universal Kriging metamodeling: A PLL example Midwest Symposium On Circuits and Systems. 277-280. DOI: 10.1109/MWSCAS.2013.6674639  0.826
2013 Ghai D, Mohanty SP, Thakral G. Double gate FinFET based mixed-signal design: A VCO case study Midwest Symposium On Circuits and Systems. 177-180. DOI: 10.1109/MWSCAS.2013.6674614  0.793
2013 Mohanty SP. Memristor: From basics to deployment Ieee Potentials. 32: 34-39. DOI: 10.1109/Mpot.2012.2216298  0.397
2013 Okobiah O, Mohanty SP, Kougianos E. Geostatistics inspired fast layout optimization of nanoscale CMOS phase locked loop Proceedings - International Symposium On Quality Electronic Design, Isqed. 546-551. DOI: 10.1109/ISQED.2013.6523664  0.829
2013 Ghai D, Mohanty SP, Thakral G. Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study Proceedings - International Symposium On Quality Electronic Design, Isqed. 406-411. DOI: 10.1109/ISQED.2013.6523643  0.808
2013 Zheng G, Mohanty SP, Kougianos E, Okobiah O. IVAMS: Intelligent metamodel-integrated Verilog-AMS for circuit-accurate system-level mixed-signal design exploration Proceedings of the International Conference On Application-Specific Systems, Architectures and Processors. 75-78. DOI: 10.1109/ASAP.2013.6567553  0.825
2013 Kundu S, Mohanty SP, Ranganathan N. Design methodologies for nanoelectronic digital and analogue circuits Iet Circuits, Devices and Systems. 7: 221-222. DOI: 10.1049/Iet-Cds.2013.0269  0.652
2013 Okobiah O, Mohanty SP, Kougianos E. Geostatistical-inspired fast layout optimisation of a nano-CMOS thermal sensor Iet Circuits, Devices and Systems. 7: 253-262. DOI: 10.1049/Iet-Cds.2012.0358  0.84
2013 Choppali U, Kougianos E, Mohanty SP, Gorman BP. Influence of annealing on polymeric precursor derived ZnO thin films on sapphire Thin Solid Films. 545: 466-470. DOI: 10.1016/J.Tsf.2013.07.085  0.527
2013 Nimgaonkar S, Gomathisankaran M, Mohanty SP. TSV: A novel energy efficient memory integrity verification scheme for embedded systems Journal of Systems Architecture. 59: 400-411. DOI: 10.1016/J.Sysarc.2013.04.008  0.783
2013 Ghai D, Mohanty SP, Thakral G. Fast optimization of nano-CMOS voltage-controlled oscillator using polynomial regression and genetic algorithm Microelectronics Journal. 44: 631-641. DOI: 10.1016/J.Mejo.2013.04.010  0.826
2013 Mathew J, Mohanty SP, Banerjee S, Pradhan DK, Jabir AM. Attack tolerant cryptographic hardware design by combining error correction and uniform switching activity Computers and Electrical Engineering. 39: 1077-1087. DOI: 10.1016/J.Compeleceng.2013.01.001  0.407
2013 Meher PK, Mohanty SP, Vinod AP. Guest Editorial: Advanced techniques for efficient electronic system design Circuits, Systems, and Signal Processing. 32: 2539-2541. DOI: 10.1007/S00034-013-9670-8  0.414
2013 Nimgaonkar S, Gomathisankaran M, Mohanty SP. MEM-DnP - A novel energy efficient approach for memory integrity detection and protection in embedded systems Circuits, Systems, and Signal Processing. 32: 2581-2604. DOI: 10.1007/S00034-013-9621-4  0.795
2013 Singh J, Mohanty SP, Pradhan DK. Robust SRAM designs and analysis Robust Sram Designs and Analysis. 1-166. DOI: 10.1007/9781461408185  0.364
2012 Garitselov O, Mohanty SP, Kougianos E. Accurate polynomial metamodeling-based ultra-fast bee colony optimization of a nano-CMOS phase-locked loop Journal of Low Power Electronics. 8: 317-328. DOI: 10.1166/Jolpe.2012.1195  0.847
2012 Sun L, Mathew J, Pradhan DK, Mohanty SP. Enhanced statistical blockade approaches for fast robustness estimation and compensation of Nano-CMOS circuits Journal of Low Power Electronics. 8: 270-282. DOI: 10.1166/Jolpe.2012.1191  0.428
2012 Mohanty SP. A Special Issue on power, parasitics, and process-variation (P3) awareness in mixed-signal design Journal of Low Power Electronics. 8: 259-260. DOI: 10.1166/Jolpe.2012.1189  0.372
2012 Zheng G, Mohanty SP, Kougianos E, Garitselov O. Verilog-AMS-PAM: Verilog-AMS integrated with parasitic-aware metamodels for ultra-fast and layout-accurate mixed-signal design exploration Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 351-356. DOI: 10.1145/2206781.2206866  0.817
2012 Garitselov O, Mohanty SP, Kougianos E, Zheng G. Particle swarm optimization over non-polynomial metamodels for fast process variation resilient design of nano-CMOS PLL Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 255-258. DOI: 10.1145/2206781.2206843  0.84
2012 Garitselov O, Mohanty SP, Kougianos E. Fast-accurate non-polynomial metamodeling for nano-CMOS PLL design optimization Proceedings of the Ieee International Conference On Vlsi Design. 316-321. DOI: 10.1109/VLSID.2012.90  0.831
2012 Okobiah O, Mohanty SP, Kougianos E, Garitselov O. Kriging-assisted ultra-fast simulated-annealing optimization of a clamped bitline sense amplifier Proceedings of the Ieee International Conference On Vlsi Design. 310-315. DOI: 10.1109/VLSID.2012.89  0.835
2012 Garitselov O, Mohanty SP, Kougianos E. A comparative study of metamodels for fast and accurate simulation of nano-CMOS circuits Ieee Transactions On Semiconductor Manufacturing. 25: 26-36. DOI: 10.1109/Tsm.2011.2173957  0.827
2012 Okobiah O, Mohanty SP, Kougianos E, Garitselov O, Zheng G. Stochastic gradient descent optimization for low power nano-CMOS thermal sensor design Proceedings - 2012 Ieee Computer Society Annual Symposium On Vlsi, Isvlsi 2012. 285-290. DOI: 10.1109/ISVLSI.2012.13  0.832
2012 Okobiah O, Mohanty SP, Kougianos E. Geostatistical-inspired metamodeling and optimization of nano-CMOS circuits Proceedings - 2012 Ieee Computer Society Annual Symposium On Vlsi, Isvlsi 2012. 326-331. DOI: 10.1109/ISVLSI.2012.12  0.843
2012 Zheng G, Mohanty SP, Kougianos E. Metamodel-assisted fast and accurate optimization of an OP-AMP for biomedical applications Proceedings - 2012 Ieee Computer Society Annual Symposium On Vlsi, Isvlsi 2012. 273-278. DOI: 10.1109/ISVLSI.2012.11  0.634
2012 Garitselov O, Mohanty SP, Kougianos E, Okobiah O. Metamodel-assisted ultra-fast memetic optimization of a PLL for WiMax and MMDS applications Proceedings - International Symposium On Quality Electronic Design, Isqed. 580-585. DOI: 10.1109/ISQED.2012.6187552  0.837
2012 Okobiah O, Mohanty SP, Kougianos E. Ordinary Kriging metamodel-assisted ant colony algorithm for fast analog design optimization Proceedings - International Symposium On Quality Electronic Design, Isqed. 458-463. DOI: 10.1109/ISQED.2012.6187533  0.837
2012 Zheng G, Mohanty SP, Kougianos E. Design and modeling of a continuous-time delta-sigma modulator for biopotential signal acquisition: Simulink vs. Verilog-AMS perspective 2012 3rd International Conference On Computing, Communication and Networking Technologies, Icccnt 2012. DOI: 10.1109/ICCCNT.2012.6396103  0.639
2012 Mohanty SP, Kougianos E. Design of experiments and integer linear programming-assisted conjugate-gradient optimisation of high-κ/metal-gate nano-complementary metal-oxide semiconductor static random access memory Iet Computers and Digital Techniques. 6: 240-248. DOI: 10.1049/Iet-Cdt.2011.0166  0.673
2012 Mohanty SP, Singh J, Kougianos E, Pradhan DK. Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAM Integration, the Vlsi Journal. 45: 33-45. DOI: 10.1016/J.Vlsi.2011.07.001  0.685
2012 Mohanty SP, Kougianos E, Okobiah O. Optimal design of a dual-oxide nano-CMOS universal level converter for multi-Vdd SoCs Analog Integrated Circuits and Signal Processing. 72: 451-467. DOI: 10.1007/S10470-012-9887-7  0.846
2011 Banerjee S, Mathew J, Mohanty SP, Pradhan DK, Ciesielski MJ. A variation-aware taylor expansion diagram-based approach for nano-CMOS register-transfer level leakage optimization Journal of Low Power Electronics. 7: 471-481. DOI: 10.1166/Jolpe.2011.1160  0.475
2011 Okobiah O, Mohanty SP, Kougianos E, Poolakkaparambil M. Towards robust nano-CMOS sense amplifier design: A dual-threshold versus dual-oxide perspective Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 145-150. DOI: 10.1145/1973009.1973039  0.829
2011 Banerjee S, Mathew J, Pradhan DK, Mohanty SP, Ciesielski M. Variation-aware TED - Based approach for nano-CMOS RTL leakage optimization Proceedings of the Ieee International Conference On Vlsi Design. 304-309. DOI: 10.1109/VLSID.2011.40  0.379
2011 Banerjee S, Mathew J, Pradhan DK, Bhattacharya BB, Mohanty SP. A routing-aware ILS design technique Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 2335-2338. DOI: 10.1109/Tvlsi.2010.2078526  0.303
2011 Garitselov O, Mohanty SP, Kougianos E. Fast optimization of nano-CMOS mixed-signal circuits through accurate metamodeling Proceedings of the 12th International Symposium On Quality Electronic Design, Isqed 2011. 405-410. DOI: 10.1109/ISQED.2011.5770758  0.842
2011 Sun L, Mathew J, Pradhan DK, Mohanty SP. Statistical blockade method for fast robustness estimation and compensation of nano-CMOS arithmetic circuits Proceedings - 2011 International Symposium On Electronic System Design, Ised 2011. 194-199. DOI: 10.1109/ISED.2011.64  0.345
2011 Garitselov O, Mohanty SP, Kougianos E, Patra P. Bee colony inspired metamodeling based fast optimization of a nano-CMOS PLL Proceedings - 2011 International Symposium On Electronic System Design, Ised 2011. 6-11. DOI: 10.1109/ISED.2011.13  0.842
2011 Mohanty SP, Kougianos E. PVT-tolerant 7-transistor SRAM optimization via polynomial regression Proceedings - 2011 International Symposium On Electronic System Design, Ised 2011. 39-44. DOI: 10.1109/ISED.2011.11  0.675
2011 Choppali U, Kougianos E, Mohanty SP, Gorman BP. Maskless deposition of ZnO films Solar Energy Materials and Solar Cells. 95: 870-876. DOI: 10.1016/J.Solmat.2010.11.004  0.547
2011 Mohanty SP, Kougianos E. Real-time perceptual watermarking architectures for video broadcasting Journal of Systems and Software. 84: 724-738. DOI: 10.1016/J.Jss.2010.12.012  0.633
2010 Pai YT, Lee LT, Ruan SJ, Chen YH, Mohanty SP, Kougianos E. Honeycomb model based skin colour detector for face detection International Journal of Computer Applications in Technology. 39: 93-100. DOI: 10.1504/Ijcat.2010.034736  0.561
2010 Thakral G, Mohanty SP, Pradhan DK, Kougianos E. DOE-ILP based simultaneous power and read stability optimization in nano-CMOS SRAM Journal of Low Power Electronics. 6: 390-400. DOI: 10.1166/Jolpe.2010.1093  0.835
2010 Thakral G, Mohanty SP, Ghai D, Pradhan DK. A DOE-ILP assisted conjugate-gradient based power and stability optimization in high-K nano-CMOS SRAM Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 323-328. DOI: 10.1145/1785481.1785556  0.8
2010 Mohanty SP, Pradhan DK. ULS: A dual-Vth/High-k Nano-CMOS universal level shifter for system-level power management Acm Journal On Emerging Technologies in Computing Systems. 6. DOI: 10.1145/1773814.1773819  0.413
2010 Mathew J, Banerjee S, Rahaman H, Pradhan DK, Mohanty SP, Jabir AM. On the synthesis of attack tolerant cryptographic hardware Proceedings of the 2010 18th Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc 2010. 286-291. DOI: 10.1109/VLSISOC.2010.5642675  0.309
2010 Mohanty SP, Ghai D, Kougianos E. A P4VT (power-performance-process-parasitic-voltage-temperature) aware dual-VTh nano-CMOS VCO Proceedings of the Ieee International Conference On Vlsi Design. 99-104. DOI: 10.1109/VLSI.Design.2010.15  0.633
2010 Thakral G, Mohanty SP, Ghai D, Pradhan DK. A combined DOE-ILP based power and read stability optimization in nano-CMOS SRAM Proceedings of the Ieee International Conference On Vlsi Design. 45-50. DOI: 10.1109/VLSI.Design.2010.14  0.788
2010 Sarivisetti G, Kougianos E, Mohanty SP, Palakodety A, Ale AK. Optimization of a 45nm CMOS voltage controlled oscillator using design of experiments 2006 Ieee Region 5 Conference. 87-90. DOI: 10.1109/TPSD.2006.5507456  0.684
2010 Adamo O, Mohanty SP, Kougianos E, Varanasi M, Cai W. VLSI architecture and FPGA prototyping of a digital camera for image security and authentication 2006 Ieee Region 5 Conference. 154-158. DOI: 10.1109/TPSD.2006.5507440  0.581
2010 Mukherjee V, Mohanty SP, Kougianos E, Allawadhi R, Velagapudi R. Gate leakage current analysis in READ/WRITE/IDLE states of a SRAM cell 2006 Ieee Region 5 Conference. 196-200. DOI: 10.1109/TPSD.2006.5507432  0.603
2010 Mandal SK, Mahapatra RN, Bhojwani PS, Mohanty SP. IntellBatt: Toward a smarter battery Computer. 43: 67-71. DOI: 10.1109/Mc.2010.72  0.379
2010 Thakral G, Mohanty SP, Ghai D, Pradhan DK. P3 (Power-Performance-Process) optimization of nano-CMOS SRAM using statistical DOE-ILP Proceedings of the 11th International Symposium On Quality Electronic Design, Isqed 2010. 176-183. DOI: 10.1109/ISQED.2010.5450470  0.796
2010 Kougianos E, Mohanty SP, Patra P. Digital nano-CMOS VLSI design courses in electrical and computer engineering through open-source/free tools Proceedings - 2010 International Symposium On Electronic System Design, Ised 2010. 265-270. DOI: 10.1109/ISED.2010.57  0.63
2010 Garitselov O, Mohanty SP, Kougianos E, Patra P. Nano-CMOS mixed-signal circuit metamodeling techniques: A comparative study Proceedings - 2010 International Symposium On Electronic System Design, Ised 2010. 191-196. DOI: 10.1109/ISED.2010.44  0.827
2010 Bani RR, Mohanty SP, Kougianos E, Thakral G. Design of a reconfigurable embedded data cache Proceedings - 2010 International Symposium On Electronic System Design, Ised 2010. 163-168. DOI: 10.1109/ISED.2010.39  0.829
2010 Kougianos E, Mohanty SP. A comparative study on gate leakage and performance of high-k nano-CMOS logic gates International Journal of Electronics. 97: 985-1005. DOI: 10.1080/00207211003733353  0.636
2010 Ghai D, Mohanty SP, Kougianos E. A variability tolerant system-on-chip ready nano-CMOS analogue-to-digital converter International Journal of Electronics. 97: 421-440. DOI: 10.1080/00207210903433478  0.831
2010 Choppali U, Kougianos E, Mohanty SP, Gorman BP. Polymeric precursor derived nanocrystalline ZnO thin films using EDTA as chelating agent Solar Energy Materials and Solar Cells. 94: 2351-2357. DOI: 10.1016/J.Solmat.2010.08.012  0.534
2009 Ghai D, Mohanty SP, Kougianos E. Unified P4 (Power-Performance-Process-Parasitic) fast optimization of a nano-CMOS VCO Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 303-308. DOI: 10.1145/1531542.1531612  0.66
2009 Singh J, Mathew J, Mohanty SP, Pradhan DK. Single ended static random access memory for low-Vdd, high-speed embedded systems Proceedings: 22nd International Conference On Vlsi Design - Held Jointly With 7th International Conference On Embedded Systems. 307-312. DOI: 10.1109/VLSI.Design.2009.38  0.32
2009 Ghai D, Mohanty SP, Kougianos E. Design of parasitic and process-variation aware Nano-CMOS RF circuits: A VCO case study Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 1339-1342. DOI: 10.1109/Tvlsi.2008.2002046  0.823
2009 Mohanty SP, Panigrahi BK. ILP based leakage optimization during Nano-CMOS RTL synthesis: A DOXCMOS Versus DTCMOS perspective 2009 World Congress On Nature and Biologically Inspired Computing, Nabic 2009 - Proceedings. 1367-1372. DOI: 10.1109/NABIC.2009.5393744  0.348
2009 Mohanty SP, Ghai D, Kougianos E, Joshi B. A Universal Level Converter Towards the Realization of Energy Efficient Implantable Drug Delivery Nano-Electro-Mechanical-Systems Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 673-679. DOI: 10.1109/ISQED.2009.4810374  0.608
2009 Mohanty SP, Kougianos E, Cai W, Ratnani M. Vlsi architectures of perceptual based video watermarking for real-time copyright protection Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 527-534. DOI: 10.1109/ISQED.2009.4810350  0.597
2009 Ghai D, Mohanty SP, Kougianos E. Variability-aware optimization of nano-CMOS active pixel sensors using design and analysis of monte carlo experiments Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 172-178. DOI: 10.1109/ISQED.2009.4810289  0.596
2009 Ghai D, Mohanty SP, Kougianos E, Patra P. A PVT aware accurate statistical logic library for High-K metal-gate nano-CMOS Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 47-54. DOI: 10.1109/ISQED.2009.4810268  0.578
2009 Mohanty SP, Ghai D, Kougiano E, Patra P. A combined packet classifier and scheduler towards net-centric multimedia processor design Digest of Technical Papers - Ieee International Conference On Consumer Electronics. DOI: 10.1109/ICCE.2009.5012155  0.316
2009 Mohanty SP. A secure digital camera architecture for integrated real-time digital rights management Journal of Systems Architecture. 55: 468-480. DOI: 10.1016/J.Sysarc.2009.09.005  0.374
2009 Kougianos E, Mohanty SP. Impact of gate-oxide tunneling on mixed-signal design and simulation of a nano-CMOS VCO Microelectronics Journal. 40: 95-103. DOI: 10.1016/J.Mejo.2008.08.017  0.715
2009 Mohanty SP, Memon N, Chatha KS. Circuits and systems for real-time security and copyright protection of multimedia Computers and Electrical Engineering. 35: 231-234. DOI: 10.1016/J.Compeleceng.2008.06.007  0.327
2009 Kougianos E, Mohanty SP, Mahapatra RN. Hardware assisted watermarking for multimedia Computers and Electrical Engineering. 35: 339-358. DOI: 10.1016/J.Compeleceng.2008.06.002  0.643
2009 Kougianos E, Mohanty SP. Discretization techniques for the efficient solution of the eigenvalue problem in heterostructures International Journal of Numerical Modelling: Electronic Networks, Devices and Fields. 22: 1-21. DOI: 10.1002/Jnm.V22:1  0.56
2008 Singh J, Pradhan DK, Hollis S, Mohanty SP. A single ended 6T SRAM cell design for ultra-low-voltage applications Ieice Electronics Express. 5: 750-755. DOI: 10.1587/Elex.5.750  0.345
2008 Ghai D, Mohanty SP, Kougianos E. A process and supply variation tolerant nano-CMOS low voltage, high speed, A/D converter for system-on-chip Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 47-52. DOI: 10.1145/1366110.1366124  0.646
2008 Pai YT, Lee LT, Ruan SJ, Chen YH, Mohanty SP, Kougianos E. Honeycomb model based skin color detector for face detection 15th International Conference On Mechatronics and Machine Vision in Practice, M2vip'08. 11-16. DOI: 10.1109/MMVIP.2008.4749499  0.505
2008 Ghai D, Mohanty SP, Kougianos E. Parasitic aware process variation tolerant voltage controlled oscillator (VCO) design Proceedings of the 9th International Symposium On Quality Electronic Design, Isqed 2008. 330-333. DOI: 10.1109/ISQED.2008.4479750  0.642
2008 Ghai D, Mohanty SP, Kougianos E. A dual oxide CMOS universal voltage converter for power management in multi-VDD SoCs Proceedings of the 9th International Symposium On Quality Electronic Design, Isqed 2008. 257-260. DOI: 10.1109/ISQED.2008.4479735  0.669
2008 Mohanty SP. ILP based gate leakage optimization using DKCMOS library during RTL synthesis Proceedings of the 9th International Symposium On Quality Electronic Design, Isqed 2008. 174-177. DOI: 10.1109/ISQED.2008.4479721  0.314
2008 Kougianos E, Mohanty SP. Design metrics for gate oxide leakage characterisation in nano-CMOS transistors International Journal of Electronics. 95: 411-423. DOI: 10.1080/00207210801976701  0.631
2008 Mohanty SP, Kougianos E, Pradhan DK. Simultaneous scheduling and binding for low gate leakage nano-complementary metal-oxide-semiconductor data path circuit behavioural synthesis Iet Computers and Digital Techniques. 2: 118-131. DOI: 10.1049/Iet-Cdt:20070108  0.617
2007 Mohanty SP, Kougianos E. Simultaneous power fluctuation and average power minimization during nano-CMOS behavioral synthesis Proceedings of the Ieee International Conference On Vlsi Design. 577-582. DOI: 10.1109/VLSID.2007.142  0.592
2007 Kougianos E, Mohanty SP. Metrics to quantify steady and transient gate leakage in nanoscale transistors: NMOS vs. PMOS perspective Proceedings of the Ieee International Conference On Vlsi Design. 195-200. DOI: 10.1109/VLSID.2007.107  0.58
2007 Adamo OB, Mohanty SP, Kougianos E, Varanasi M. VLSI architecture for encryption and watermarking units towards the making of a secure camera 2006 Ieee International Systems-On-Chip Conference, Soc. 141-144. DOI: 10.1109/SOCC.2006.283868  0.535
2007 Singh J, Mathew J, Mohanty SP, Pradhan DK. Statistical analysis of steady state leakage currents in nano-CMOS devices 25th Norchip Conference, Norchip. DOI: 10.1109/NORCHP.2007.4481069  0.307
2007 Kincaid CA, Mohanty SP, Mikler AR, Kougianos E, Parker B. A high performance ASIC for Cellular Automata (CA) applications Proceedings - 9th International Conference On Information Technology, Icit 2006. 289-290. DOI: 10.1109/ICIT.2006.9  0.522
2007 Mohanty SP, Pati N, Kougianos E. A watermarking co-processor for new generation graphics processing units Digest of Technical Papers - Ieee International Conference On Consumer Electronics. DOI: 10.1109/ICCE.2007.341552  0.6
2007 Mohanty SP, Adamo OB, Kougianos E. VLSI architecture of an invisible watermarking unit for a biometric-based security system in a digital camera Digest of Technical Papers - Ieee International Conference On Consumer Electronics. DOI: 10.1109/ICCE.2007.341340  0.606
2007 Mohanty SP, Kougianos E, Ranganathan N. VLSI architecture and chip for combined invisible robust and fragile watermarking Iet Computers and Digital Techniques. 1: 600-611. DOI: 10.1049/Iet-Cdt:20070057  0.744
2006 Mohanty SP, Ranganathan N, Chappidi SK. ILP models for simultaneous energy and transient power minimization during behavioral synthesis Acm Transactions On Design Automation of Electronic Systems. 11: 186-212. DOI: 10.1145/1124713.1124725  0.595
2006 Mohanty SP, Kougianos E. Modeling and reduction of gate leakage during behavioral synthesis of NanoCMOS circuits Proceedings of the Ieee International Conference On Vlsi Design. 2006: 83-88. DOI: 10.1109/VLSID.2006.118  0.589
2006 Mohanty SP, Ranganathan N, Balakrishnan K. A dual voltage-frequency VLSI chip for image watermarking in DCT domain Ieee Transactions On Circuits and Systems Ii: Express Briefs. 53: 394-398. DOI: 10.1109/Tcsii.2006.870216  0.635
2006 Li W, Mohanty SP, Kavi K. A page-based hybrid (software-hardware) dynamic memory allocator Ieee Computer Architecture Letters. 5. DOI: 10.1109/L-Ca.2006.13  0.307
2006 Mohanty SP, Velagapudi R, Kougianos E. Dual-K versus dual-T technique for gate leakage reduction: A comparative perspective Proceedings - International Symposium On Quality Electronic Design, Isqed. 564-569. DOI: 10.1109/ISQED.2006.52  0.602
2006 Mohanty SP, Guturu P, Kougianos E, Pati N. A novel invisible color image watermarking scheme using image adaptive watermark creation and robust insertion-extraction Ism 2006 - 8th Ieee International Symposium On Multimedia. 153-160. DOI: 10.1109/ISM.2006.7  0.527
2006 Mohanty SP, Kougianos E. Steady and transient state analysis of gate leakage current in nanoscale CMOS logic gates Ieee International Conference On Computer Design, Iccd 2006. 210-215. DOI: 10.1109/ICCD.2006.4380819  0.587
2006 Kougianos E, Mohanty SP. The effect of transverse energy on electronic bound states in heterostructure quantum wells Semiconductor Science and Technology. 21: 1472-1477. DOI: 10.1088/0268-1242/21/10/020  0.548
2006 Kougianos E, Mohanty SP. Effective tunneling capacitance: A new metric to quantify transient gate leakage current Proceedings - Ieee International Symposium On Circuits and Systems. 2937-2940.  0.538
2006 Mohanty SP, Velagapudi R, Kougianos E. Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits Proceedings -Design, Automation and Test in Europe, Date. 1.  0.615
2005 Mohanty SP, Ranganathan N. Energy-efficient datapath scheduling using multiple voltages and dynamic clocking Acm Transactions On Design Automation of Electronic Systems. 10: 330-353. DOI: 10.1145/1059876.1059883  0.593
2005 Mohanty SP, Ranganathan N, Namballa RK. A VLSI architecture for visible watermarking in a secure still digital camera (S 2DC) design (corrected) Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 1002-1011. DOI: 10.1109/Tvlsi.2005.857991  0.628
2005 Mohanty SP, Ranganathan N, Namballa RK. A VLSI architecture for watermarking in a secure still digital camera (S 2DC) design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 808-817. DOI: 10.1109/Tvlsi.2005.850095  0.629
2005 Mohanty SP, Ranganathan N. Simultaneous peak and average power minimization during datapath scheduling Ieee Transactions On Circuits and Systems I: Regular Papers. 52: 1157-1165. DOI: 10.1109/Tcsi.2005.849131  0.615
2005 Mohanty SP, Ranganathan N, Balakrishnan K. Design of a low power image watermarking encoder using dual voltage and frequency Proceedings of the Ieee International Conference On Vlsi Design. 153-158. DOI: 10.1109/ICVD.2005.73  0.315
2005 Mukherjee V, Mohanty SP, Kougianos E. A dual dielectric approach for performance aware gate tunneling reduction in combinational circuits Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 2005: 431-436. DOI: 10.1109/ICCD.2005.5  0.608
2004 Mohanty SP, Ranganathan N. A framework for energy and transient power reduction during behavioral synthesis Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 562-572. DOI: 10.1109/Tvlsi.2004.827568  0.586
2004 Mohanty SP, Ranganathan N, Namballa RK. VLSI implementation of visible watermarking for a secure digital still camera design Proceedings of the Ieee International Conference On Vlsi Design. 17: 1063-1068.  0.302
2003 Mohanty SP, Ranganathan N. Energy efficient scheduling for datapath synthesis Proceedings of the Ieee International Conference On Vlsi Design. 2003: 446-451. DOI: 10.1109/ICVD.2003.1183175  0.528
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