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Dean L. Lewis, Ph.D. - Publications

Affiliations: 
2012 Electrical and Computer Engineering Georgia Institute of Technology, Atlanta, GA 
Area:
Computer Engineering, Electronics and Electrical Engineering
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3 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2015 Kim DH, Athikulwongse K, Healy MB, Hossain MM, Jung M, Khorosh I, Kumar G, Lee YJ, Lewis DL, Lin TW, Liu C, Panth S, Pathak M, Ren M, Shen G, et al. Design and analysis of 3D-MAPS (3D Massively parallel processor with stacked memory) Ieee Transactions On Computers. 64: 112-125. DOI: 10.1109/Tc.2013.192  0.45
2011 Zhao X, Lewis DL, Lee HHS, Lim SK. Low-power clock tree design for pre-bond testing of 3-D stacked ICs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 732-745. DOI: 10.1109/Tcad.2010.2098130  0.301
2010 Woo DH, Seong NH, Lewis DL, Lee HHS. An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth Proceedings - International Symposium On High-Performance Computer Architecture.  0.445
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