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Seung-Hwan Kim, Ph.D. - Publications

Affiliations: 
2006 University of Florida, Gainesville, Gainesville, FL, United States 
Area:
Electronics and Electrical Engineering
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9 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2024 Kang T, Park J, Jung H, Choi H, Lee SM, Lee N, Lee RG, Kim G, Kim SH, Kim HJ, Yang CW, Jeon J, Kim YH, Lee S. High-κ dielectric (HfO)/2D Semiconductor (HfSe) Gate Stack for Low-Power Steep-switching Computing Devices. Advanced Materials (Deerfield Beach, Fla.). e2312747. PMID 38531112 DOI: 10.1002/adma.202312747  0.345
2023 Kim JH, Kim SG, Kim SH, Han KH, Kim J, Yu HY. Highly Tunable Negative Differential Resistance Device Based on Insulator-to-Metal Phase Transition of Vanadium Dioxide. Acs Applied Materials & Interfaces. PMID 37339325 DOI: 10.1021/acsami.3c03213  0.338
2021 Kim SG, Kim SH, Kim GS, Jeon H, Kim T, Yu HY. Steep-Slope Gate-Connected Atomic Threshold Switching Field-Effect Transistor with MoS Channel and Its Application to Infrared Detectable Phototransistors. Advanced Science (Weinheim, Baden-Wurttemberg, Germany). 8: 2100208. PMID 34194944 DOI: 10.1002/advs.202100208  0.349
2007 Kim S, Fossum JG. Design Optimization and Performance Projections of Double-Gate FinFETs With Gate–Source/Drain Underlap for SRAM Application Ieee Transactions On Electron Devices. 54: 1934-1942. DOI: 10.1109/Ted.2007.901070  0.632
2006 Kim S, Fossum J, Yang J. Modeling and Significance of Fringe Capacitance in Nonclassical CMOS Devices With Gate–Source/Drain Underlap Ieee Transactions On Electron Devices. 53: 2143-2150. DOI: 10.1109/Ted.2006.880369  0.604
2005 Kim S, Fossum JG, Trivedi VP. Bulk inversion in FinFETs and implied insights on effective gate width Ieee Transactions On Electron Devices. 52: 1993-1997. DOI: 10.1109/Ted.2005.854286  0.621
2005 Kim S, Fossum JG. Nanoscale CMOS: potential nonclassical technologies versus a hypothetical bulk-silicon technology Solid-State Electronics. 49: 595-605. DOI: 10.1016/J.Sse.2004.12.004  0.641
2003 Mehandru R, Kim S, Kim J, Ren F, Lothian JR, Pearton SJ, Park SS, Park YJ. Thermal simulations of high power, bulk GaN rectifiers Solid-State Electronics. 47: 1037-1043. DOI: 10.1016/S0038-1101(02)00481-1  0.395
2002 Mehandru R, Dang G, Kim S, Ren F, Hobson W, Lopata J, Pearton S, Chang W, Shen H. Finite difference analysis of thermal characteristics of CW operation 850 nm lateral current injection and implant-apertured VCSEL with flip-chip bond design Solid-State Electronics. 46: 699-704. DOI: 10.1016/S0038-1101(01)00329-X  0.351
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