Sachin Sapatnekar - US grants

Affiliations: 
Electrical Engineering University of Minnesota, Twin Cities, Minneapolis, MN 
Area:
Electronics and Electrical Engineering

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High-probability grants

According to our matching algorithm, Sachin Sapatnekar is the likely recipient of the following grants.
Years Recipients Code Title / Keywords Matching
score
1995 — 1999 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Career: Gate-Level Performance Optimization of Pipelines and General Sequential Circuits

@ Iowa State University

1
1998 — 2002 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Performance Optimization of Vlsi Interconnect

@ University of Minnesota-Twin Cities

1
2001 — 2004 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Design Automation Techniques For Soi and High-Performance Bulk Cmos Designs

@ University of Minnesota-Twin Cities

1
2002 — 2008 Vrudhula, Sarma (co-PI) [⬀]
Sylvester, Dennis (co-PI) [⬀]
Blaauw, David [⬀]
Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Itr: Methodologies For Robust Design of Information Systems Under Multiple Sources of Uncertainty

@ University of Michigan Ann Arbor

0.958
2006 — 2011 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Stochastically-Inspired Methods For Solving Systems of Linear Equations

@ University of Minnesota-Twin Cities

1
2006 — 2010 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Thermal Effects in Integrated Circuits

@ University of Minnesota-Twin Cities

1
2009 — 2013 Sapatnekar, Sachin
Kim, Chris
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

An Integrated Design and Cad Approach For Efficient Power Delivery in Multicore Processors

@ University of Minnesota-Twin Cities

1
2010 — 2015 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Shf: Small: Enabling Resiliency in Nanometer-Scale Cmos Circuits

@ University of Minnesota-Twin Cities

1
2012 — 2017 Kim, Chris
Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Shf: Medium: Collaborative Research: Ageless: Aging Estimation and Lifetime Enhancement in Silicon Systems

@ University of Minnesota-Twin Cities

1
2014 — 2017 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Shf: Small: Stress Management in Integrated Circuits

@ University of Minnesota-Twin Cities

1
2015 — 2018 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Shf: Small: Collaborative Research:Variation-Resilient Vlsi Systems With Cross-Layer Controlled Approximation

@ University of Minnesota-Twin Cities

1
2017 — 2020 Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Shf: Small: Enchancing the Reliability of Mixed-Signal Integrated Circuits

@ University of Minnesota-Twin Cities

1
2017 — 2020 Karpuzcu, Ulya
Wang, Jian-Ping (co-PI) [⬀]
Sapatnekar, Sachin
N/AActivity Code Description:
No activity code was retrieved: click on the grant title for more information

Spx: Scalable in-Memory Processing Using Spintronics

@ University of Minnesota-Twin Cities

1