Kapil Anand, Ph.D.

Affiliations: 
2013 Electrical Engineering University of Maryland, College Park, College Park, MD 
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"Kapil Anand"

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Rajeev Barua grad student 2013 University of Maryland
 (A compiler level intermediate representation based binary analysis system and its applications.)
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Publications

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Anand K, Barua R. (2015) Instruction-cache locking for improving embedded systems performance Acm Transactions On Embedded Computing Systems. 14
Kotha A, Anand K, Creech T, et al. (2015) Affine Parallelization Using Dependence and Cache Analysis in a Binary Rewriter Ieee Transactions On Parallel and Distributed Systems. 26: 2154-2163
Kotha A, Anand K, Creech T, et al. (2014) Affine parallelization of loops with run-time dependent bounds from binaries Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 8410: 554-574
Anand K, Smithson M, Elwazeer K, et al. (2013) A compiler-level intermediate representation based binary analysis and rewriting system Proceedings of the 8th Acm European Conference On Computer Systems, Eurosys 2013. 295-308
El Wazeer K, Anand K, Kotha A, et al. (2013) Scalable variable and data type detection in a binary rewriter Proceedings of the Acm Sigplan Conference On Programming Language Design and Implementation (Pldi). 51-60
Smithson M, Elwazeer K, Anand K, et al. (2013) Static binary rewriting without supplemental information: Overcoming the tradeoff between coverage and correctness Proceedings - Working Conference On Reverse Engineering, Wcre. 52-61
Anand K, Elwazeer K, Kotha A, et al. (2013) An accurate stack memory abstraction and symbolic analysis framework for executables Ieee International Conference On Software Maintenance, Icsm. 90-99
O'Sullivan P, Anand K, Kotha A, et al. (2011) Retrofitting security in COTS software with binary rewriting Ifip Advances in Information and Communication Technology. 354: 154-172
Kotha A, Anand K, Smithson M, et al. (2010) Automatic parallelization in a binary rewriter Proceedings of the Annual International Symposium On Microarchitecture, Micro. 547-557
Anand K, Barua R. (2009) Instruction cache locking inside a binary rewriter Embedded Systems Week 2009 - 2009 International Conference On Compilers, Architecture, and Synthesis For Embedded Systems, Cases'09. 185-194
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