Nitin Chandrachoodan, Ph.D.

Affiliations: 
2002 University of Maryland, College Park, College Park, MD 
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"Nitin Chandrachoodan"

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Shuvra S. Bhattacharyya grad student 2002 University of Maryland
 (Performance analysis and hierarchical timing for DSP system synthesis.)
K. J. Ray Liu grad student 2002 University of Maryland
 (Performance analysis and hierarchical timing for DSP system synthesis.)
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Publications

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Peddawad C, Goel A, Dheeraj B, et al. (2016) IitRACE: A memory efficient engine for fast incremental timing analysis and clock pessimism removal 2015 Ieee/Acm International Conference On Computer-Aided Design, Iccad 2015. 903-909
Potluri S, Trinadh AS, Sobhan Babu C, et al. (2015) DFT assisted techniques for peak launch-to-capture power reduction during launch-on-shift at-speed testing Acm Transactions On Design Automation of Electronic Systems. 21
Teja SSS, Embrandiri SS, Chandrachoodan N, et al. (2015) EOG based virtual keyboard 2015 41st Annual Northeast Biomedical Engineering Conference, Nebec 2015
Embrandiri SS, Teja SSS, Reddy M. R, et al. (2015) Effect of stimulation shapes on the Steady-State Visual-Evoked response 2015 41st Annual Northeast Biomedical Engineering Conference, Nebec 2015
Singh VP, Chandrachoodan N, Prabhakar A. (2015) Designing a passive star optical network for the India-based Neutrino Observatory 2015 21st National Conference On Communications, Ncc 2015
Natarajan K, Chandrachoodan N. (2015) Non-uniform DFT implementation for channel simulations in GPU 2015 21st National Conference On Communications, Ncc 2015
Suresh SVS, Rosh KSG, Kumar KCG, et al. (2015) Design of flight computer module for IITMSAT International Conference On Space Science and Communication, Iconspace. 2015: 187-192
Suresh SVS, Dommeti CS, Rosh KSG, et al. (2015) Design of command and Data Management System for IITMSAT International Conference On Space Science and Communication, Iconspace. 2015: 11-16
Narasimman R, Prabhakar A, Chandrachoodan N. (2015) Implementation of a 30 ps resolution time to digital converter in FPGA 2015 International Conference On Electronic Design, Computer Networks and Automated Verification, Edcav 2015. 12-17
Rangachari S, Balakrishnan J, Chandrachoodan N. (2014) Scalable low power FFT/IFFT architecture with dynamic bit width configurability Proceedings of the Ieee International Conference On Vlsi Design. 359-364
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