Xiaoning Qi, Ph.D.

2001

Robert W. Dutton	grad student	2001	Stanford
(High -frequency characterization and modeling of on -chip interconnects and RF IC wire bonds.)

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Xu W, Wang G, Jiang J, et al. (2011) A high-PSR transient-enhanced output-capacitorless CMOS low-dropout regulator for SoC applications International Journal of Electronics. 98: 1319-1332
Qi X, Lo SC, Gyure A, et al. (2006) Efficient subthreshold leakage current optimization - Leakage current optimization and layout migration for 90- and 65- nm ASIC libraries Ieee Circuits & Devices. 22: 39-47
Qi X, Gyure A, Luo Y, et al. (2006) Simulation of interconnect inductive impact in the presence of process variations in 90 nm and beyond Ieee Electron Device Letters. 27: 696-698
Kleveland B, Qi X, Madden L, et al. (2002) High-frequency characterization of on-chip digital interconnects Ieee Journal of Solid-State Circuits. 37: 716-725
Wang G, Qi X, Yu Z. (2001) Device level modeling of metal-insulator-semiconductor interconnects Ieee Transactions On Electron Devices. 48: 1672-1682
Qi X, Yue P, Arnborg T, et al. (2000) A fast 3D modeling approach to electrical parameters extraction of bonding wires for RF circuits Ieee Transactions On Advanced Packaging. 23: 480-488