Yiping Fan, Ph.D.
Affiliations: | 2006 | University of California, Los Angeles, Los Angeles, CA |
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithmsGoogle:
"Yiping Fan"Parents
Sign in to add mentorJason Cong | grad student | 2006 | UCLA | |
(Interconnect oriented microarchitectures and resource binding in behavioral synthesis.) |
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Publications
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Fang J, Singh S, Cheng C, et al. (2023) Genome-wide mapping of cancer dependency genes and genetic modifiers of chemotherapy in high-risk hepatoblastoma. Nature Communications. 14: 4003 |
Singh S, Abu-Zaid A, Jin H, et al. (2022) Targeting KDM4 for treating PAX3-FOXO1-driven alveolar rhabdomyosarcoma. Science Translational Medicine. 14: eabq2096 |
Singh S, Quarni W, Goralski M, et al. (2021) Targeting the spliceosome through RBM39 degradation results in exceptional responses in high-risk neuroblastoma models. Science Advances. 7: eabj5405 |
Fang S, Yu Z, Lin Y, et al. (2016) Effects of additives on the co-pyrolysis of municipal solid waste and paper sludge by using thermogravimetric analysis. Bioresource Technology. 209: 265-272 |
Lin Y, Liao Y, Yu Z, et al. (2016) Co-pyrolysis kinetics of sewage sludge and oil shale thermal decomposition using TGA-FTIR analysis Energy Conversion and Management. 118: 345-352 |
Fan Y, Yu Z, Fang S, et al. (2016) Investigation on the co-combustion of oil shale and municipal solid waste by using thermogravimetric analysis Energy Conversion and Management. 117: 367-374 |
Chen D, Cong J, Fan Y, et al. (2010) LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization Ieee Transactions On Very Large Scale Integration Systems. 18: 564-577 |
Cong J, Fan Y, Xu J. (2009) Simultaneous resource binding and interconnection optimization based on a distributed register-file microarchitecture Acm Transactions On Design Automation of Electronic Systems. 14: 35 |
Cong J, Fan Y, Han G, et al. (2004) Architecture and synthesis for on-chip multicycle communication Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 550-564 |
Fan Y, Bei J, Bian J, et al. (2001) VERIS: An Efficient Model Checker for Synchronous VHDL Designs Journal of Computer-Aided Design & Computer Graphics. 97-107 |