Steven M. Nowick
Affiliations: | Computer Science | Columbia University, New York, NY |
Area:
Asynchronous and Mixed-Timing Digital Circuits and Systems, Computer-Aided Design, Networks-on-Chip, Interconnection Networks for Parallel Processors, Low-Power Digital DesignWebsite:
http://www.cs.columbia.edu/~nowick/Google:
"Steven Mark Nowick" OR "Steven M. Nowick"Bio:
https://www.proquest.com/openview/bb4017d7e996912e8e03647d07e80da1/1
Cross-listing: Computer Science Tree
Parents
Sign in to add mentor| David L. Dill | grad student | 1993 | Stanford (Computer Science Tree) | |
| (Automatic synthesis of burst-mode asynchronous controllers) | ||||
Children
Sign in to add trainee| Montek Singh | grad student | 2002 | Columbia |
| Michael Theobald | grad student | 2002 | Columbia |
| Tiberiu Chelcea | grad student | 2004 | Columbia |
| Peggy B. McGee | grad student | 2010 | Columbia |
| Melinda Y. Agyekum | grad student | 2011 | Columbia |
| Christos Vezyrtzis | grad student | 2013 | Columbia |
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Publications
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| Bhardwaj K, Nowick SM. (2019) A Continuous-Time Replication Strategy for Efficient Multicast in Asynchronous NoCs Ieee Transactions On Very Large Scale Integration Systems. 27: 350-363 |
| Vezyrtzis C, Tsividis Y, Nowick SM. (2015) Improving the Energy Efficiency of Pipelined Delay Lines Through Adaptive Granularity Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 2009-2022 |
| Nowick SM, Singh M. (2015) Asynchronous design-part 1: Overview and recent advances Ieee Design and Test. 32: 5-18 |
| Nowick SM, Singh M. (2015) Asynchronous design-part 2: Systems and methodologies Ieee Design and Test. 32: 19-28 |
| Vezyrtzis C, Jiang W, Nowick SM, et al. (2014) A flexible, event-driven digital filter with frequency response independent of input sample rate Ieee Journal of Solid-State Circuits. 49: 2292-2304 |
| Vezyrtzis C, Jiang W, Nowick SM, et al. (2013) A flexible, clockless digital filter European Solid-State Circuits Conference. 65-68 |
| Ghiribaldi A, Bertozzi D, Nowick SM. (2013) A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems Proceedings -Design, Automation and Test in Europe, Date. 332-337 |
| Agyekum MY, Nowick SM. (2012) Error-correcting unordered codes and hardware support for robust asynchronous global communication Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 31: 75-88 |
| Vezyrtzis C, Tsividis Y, Nowick SM. (2012) Designing pipelined delay lines with dynamically-adaptive granularity for low-energy applications Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 329-336 |
| Singh M, Nowick SM. (2011) Introduction to special issue: Asynchrony in system design Acm Journal On Emerging Technologies in Computing Systems. 7 |