Paul R. Gray

Affiliations: 
Electrical Engineering and Computer Science University of California, Berkeley, Berkeley, CA, United States 
Area:
Design, Modeling and Analysis (DMA); Integrated Circuits (INC)
Website:
https://www2.eecs.berkeley.edu/Faculty/Homepages/gray.html
Google:
"Paul Russell Gray" OR "Paul R. Gray"
Bio:

https://www2.eecs.berkeley.edu/Pubs/Dissertations/Faculty/gray.html
https://www.proquest.com/openview/9ec56455fa9359b5b0a41b114dd81378/1

Parents

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Douglas James Hamilton grad student 1969 University of Arizona
 (Electro-Thermal Integrated Circuits)

Children

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Yannis Tsividis grad student 1974-1976 UC Berkeley
David J. Allstot grad student 1979 UC Berkeley
Bang-Sup Song grad student 1983 UC Berkeley
George Chien grad student 2000 UC Berkeley
Li Lin grad student 2000 UC Berkeley
Keith K. Onodera grad student 2000 UC Berkeley
Jacques C. Rudell grad student 2000 UC Berkeley
Ramakrishna S. Narayanaswami grad student 2001 UC Berkeley
Jeffrey J. Ou grad student 2001 UC Berkeley
Yun Chiu grad student 2004 UC Berkeley
Jeffrey A. Weldon grad student 2005 UC Berkeley
Naratip Wongkomet grad student 2006 UC Berkeley
Luns Tee grad student 2007 UC Berkeley
King C. Tsai grad student 2007 UC Berkeley
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Publications

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Gray PR. (2014) Recollections from Yannis' Graduate Student Years at Berkeley Ieee Solid-State Circuits Magazine. 6: 31-31
Wongkomet N, Tee L, Gray PR. (2006) A +31.5 dBm CMOS RF doherty power amplifier for wireless communications Ieee Journal of Solid-State Circuits. 41: 2852-2858
Wongkomet N, Tee L, Gray PR. (2006) A1.7GHz 1.5W CMOS RF doherty power amplifier for wireless communications Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 486+469
Tee L, Sacchi E, Bocock R, et al. (2006) A cartesian-feedback linearized CMOS RF transmitter for EDGE modulation Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 232-233
Chiu Y, Nikolić B, Gray PR. (2005) Scaling of analog-to-digital converters into ultra-deep-submicron CMOS Proceedings of the Custom Integrated Circuits Conference. 2005: 368-375
Chiu Y, Tsang CW, Nikolić B, et al. (2004) Least mean square adaptive digital background calibration of pipelined analog-to-digital converters Ieee Transactions On Circuits and Systems I: Regular Papers. 51: 38-46
Chiu Y, Gray PR, Nikolić B. (2004) A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR Ieee Journal of Solid-State Circuits. 39: 2139-2151
Chiu Y, Gray PR, Nikolic B. (2004) A 1.8V 14b 10MS/s pipelined ADC in 0.18μm CMOS with 99dB SFDR Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 47: 458-459+451+539
Weldon JA, Sekhar Narayanaswami R, Rudell JC, et al. (2001) A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers Ieee Journal of Solid-State Circuits. 36: 2003-2015
Weldon JA, Rudell JC, Lin L, et al. (2001) A 1.75GHz highly-integrated narrow-band CMOS transmitter with harmonic-rejection mixers Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 160-161+442
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