Varghese George, Ph.D.

Affiliations: 
2000 University of California, Berkeley, Berkeley, CA 
Area:
Communications & Networking (COMNET); Design, Modeling and Analysis (DMA); Energy (ENE); Integrated Circuits (INC); Signal Processing (SP); Computer architecture
Google:
"Varghese George"

Parents

Sign in to add mentor
Jan M. Rabaey grad student 2000 UC Berkeley
 (Low-energy field -programmable gate array.)
BETA: Related publications

Publications

You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect.

Damaraju S, George V, Jahagirdar S, et al. (2012) A 22nm IA multi-CPU and GPU system-on-chip Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 55: 56-57
Siers S, Damaraju S, George V, et al. (2012) The first 22nm IA multi-CPU and GPU system-on-chip using tri-gate transistors Proceedings - 2012 Ieee Asian Solid-State Circuits Conference, a-Sscc. 9-12
Zhang H, George V, Rabaey JM. (2000) Low-swing on-chip signaling techniques: effectiveness and robustness Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 8: 264-272
Zhang H, Prabhu V, George V, et al. (2000) 1-V heterogeneous reconfigurable DSP IC for wireless baseband digital signal processing Ieee Journal of Solid-State Circuits. 35: 1697-1704
See more...