Louis P. Alarcon, Ph.D.

Affiliations: 
2010 Electrical Engineering & Computer Sciences University of California, Berkeley, Berkeley, CA, United States 
Area:
Communications & Networking (COMNET); Design, Modeling and Analysis (DMA); Energy (ENE); Integrated Circuits (INC); Signal Processing (SP); Computer architecture
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"Louis Alarcon"

Parents

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Jan M. Rabaey grad student 2010 UC Berkeley
 (Sense Amplifier-Based Pass Transistor Logic.)
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Publications

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Panes AM, Cabanlong JF, Inocencio DC, et al. (2016) An energy efficient 2.4GHz OOK RF transceiver implemented in a 65nm CMOS process Ieee Region 10 Annual International Conference, Proceedings/Tencon. 2016
Alba MEV, Chua AN, Lofamia WVV, et al. (2012) An aggressive power optimization of the ARM9-based core using RAZOR Ieee Region 10 Annual International Conference, Proceedings/Tencon
Richmond J, John M, Alarcon L, et al. (2012) Active RFID: Perpetual wireless communications platform for sensors European Solid-State Circuits Conference. 434-437
Alarcon LP, Liu TT, Rabaey JM. (2011) A low-leakage parallel CRC generator for ultra-low power applications Proceedings - Ieee International Symposium On Circuits and Systems. 2063-2066
Markovic D, Wang CC, Alarcon LP, et al. (2010) Ultralow-power design in near-threshold region Proceedings of the Ieee. 98: 237-252
Liu TT, Alarcon LP, Pierson MD, et al. (2009) Asynchronous computing in sense amplifier-based pass transistor logic Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 883-892
Rosales MD, Tan HL, Alarcon LP, et al. (2007) De-embedding Techniques for Passive Components Implemented on a 0.25 um Digital CMOS Process Piers Online. 3: 184-188
Alarcón LP, Liu T, Pierson MD, et al. (2007) Exploring Very Low-Energy Logic: A Case Study Journal of Low Power Electronics. 3: 223-233
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