Mikhail Dorojevets
Affiliations: | Electrical and Computer Engineering | Stony Brook University, Stony Brook, NY, United States |
Area:
Parallel computer architecture; high-performance systems design; superconductor processorsGoogle:
"Mikhail Dorojevets"Children
Sign in to add trainee| Christopher L. Ayala | grad student | 2012 | SUNY Stony Brook |
| Artur K. Kasperek | grad student | 2012 | SUNY Stony Brook |
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Publications
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| Dorojevets M. (2020) Energy-Efficient Superconductor Bloom Filters for Streaming Data Inspection Ieee Transactions On Dependable and Secure Computing. 17: 1015-1025 |
| Dorojevets M, Chen Z, Ayala CL, et al. (2015) Towards 32-bit energy-efficient superconductor RQL processors: The cell-level design and analysis of key processing and on-chip storage units Ieee Transactions On Applied Superconductivity. 25 |
| Dorojevets M, Chen Z. (2015) Fast pipelined storage for high-performance energy-efficient computing with superconductor technology 2015 12th International Conference and Expo On Emerging Technologies For a Smarter World, Cewit 2015 |
| Dorojevets M, Ayala CL, Yoshikawa N, et al. (2013) 16-Bit wave-pipelined sparse-tree RSFQ adder Ieee Transactions On Applied Superconductivity. 23 |
| Dorojevets M, Ayala CL, Yoshikawa N, et al. (2013) 8-bit asynchronous sparse-tree superconductor RSFQ arithmetic-logic unit with a rich set of operations Ieee Transactions On Applied Superconductivity. 23 |
| Dorojevets M, Kasperek AK, Yoshikawa N, et al. (2013) 20-GHz 8 $\times$ 8-bit Parallel Carry-Save Pipelined RSFQ Multiplier Ieee Transactions On Applied Superconductivity. 23: 1300104-1300104 |
| Kirichenko AF, Sahu A, Filippov TV, et al. (2013) Demonstration of an 8×8-bit RSFQ multi-port register file 2013 Ieee 14th Internationalsuperconductive Electronics Conference, Isec 2013 |
| Filippov TV, Sahu A, Kirichenko AF, et al. (2012) 20 GHz operation of an asynchronous wave-pipelined RSFQ arithmetic-logic unit Physics Procedia. 36: 59-65 |
| Filippov T, Dorojevets M, Sahu A, et al. (2011) 8-bit asynchronous wave-pipelined RSFQ Arithmetic-Logic Unit Ieee Transactions On Applied Superconductivity. 21: 847-851 |
| Dorojevets M, Ayala CL, Kasperek AK. (2011) Data-flow microarchitecture for wide datapath rsfq processors: Design study Ieee Transactions On Applied Superconductivity. 21: 787-791 |