Kaustav Banerjee

Affiliations: 
Electrical & Computer Engineering University of California, Santa Barbara, Santa Barbara, CA, United States 
Area:
Computer Engineering/ Electronics & Photonics
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"Kaustav Banerjee"
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Publications

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Cao W, Bu H, Vinet M, et al. (2023) The future transistors. Nature. 620: 501-515
Cao W, Banerjee K. (2020) Author Correction: Is negative capacitance FET a steep-slope logic switch? Nature Communications. 11: 1094
Cao W, Banerjee K. (2020) Is negative capacitance FET a steep-slope logic switch? Nature Communications. 11: 196
Pal A, Cao W, Banerjee K. (2020) A Compact Current-Voltage Model for 2-D-Semiconductor-Based Lateral Homo-/Hetero-Junction Tunnel-FETs Ieee Transactions On Electron Devices. 1-9
Cao W, Huang M, Yeh C, et al. (2020) Impact of Transport Anisotropy on the Performance of van der Waals Materials-Based Electron Devices Ieee Transactions On Electron Devices. 67: 1310-1316
Xu C, Kolluri SK, Endo K, et al. (2020) Correction to “Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability” Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 277-277
Jiang J, Parto K, Cao W, et al. (2019) Ultimate Monolithic-3D Integration With 2D Materials: Rationale, Prospects, and Challenges Ieee Journal of the Electron Devices Society. 7: 878-887
Cao W, Jiang J, Xie X, et al. (2018) 2-D Layered Materials for Next-Generation Electronics: Opportunities and Challenges Ieee Transactions On Electron Devices. 65: 4109-4121
Hu Y, Brus V, Cao W, et al. (2017) Understanding the Device Physics in Polymer-Based Ionic-Organic Ratchets. Advanced Materials (Deerfield Beach, Fla.)
Jiang J, Kang J, Cao W, et al. (2016) Intercalation Doped Multilayer-Graphene-Nanoribbons for Next-Generation Interconnects. Nano Letters
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