Hendrawan Soeleman, Ph.D.
Affiliations: | 2000 | Purdue University, West Lafayette, IN, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Hendrawan Soeleman"Parents
Sign in to add mentor| Kaushik Roy | grad student | 2000 | Purdue | |
| (Ultra -low power digital sub-threshold logic design.) | ||||
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Publications
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| Kim CHI, Soeleman H, Roy K. (2003) Ultra-low-power DLMS adaptive filter for hearing aid applications Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 11: 1058-1067 |
| Soeleman H, Roy K, Paul BC. (2001) Robust subthreshold logic for ultra-low power operation Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 9: 90-99 |
| Paul BC, Soeleman H, Roy K. (2001) An 8x8 sub-threshold digital CMOS carry save array multiplier European Solid-State Circuits Conference. 377-380 |
| Soeleman H, Roy K, Paul B. (2001) Sub-domino logic: Ultra-low power dynamic sub-threshold digital logic Proceedings of the Ieee International Conference On Vlsi Design. 211-214 |
| Soeleman H, Roy K, Chou TL. (2000) Estimating Circuit Activity in Combinational CMOS Digital Circuits Ieee Design and Test of Computers. 17: 112-119 |