Paul V. Gratz, Ph.D.

Affiliations: 
2008 Electrical Engineering University of Texas at Austin, Austin, Texas, U.S.A. 
Area:
Electronics and Electrical Engineering, Computer Science
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"Paul Gratz"

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Stephen W. Keckler grad student 2008 UT Austin
 (Network-on-chip implementation and performance improvement through workload characterization and congestion awareness.)
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Publications

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Wang P, McHale L, Gratz PV, et al. (2019) GenMatcher: A Generic Clustering-Based Arbitrary Matching Framework Acm Transactions On Architecture and Code Optimization. 15: 51
Ramrakhyani A, Gratz PV, Krishna T. (2019) Synchronized Progress in Interconnection Networks (SPIN): A New Theory for Deadlock Freedom Ieee Micro. 39: 110-117
Yang YS, Deshpande H, Choi G, et al. (2018) SDPR: Improving Latency and Bandwidth in On-Chip Interconnect Through Simultaneous Dual-Path Routing Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 545-558
AlBarakat LM, Gratz PV, Jimenez DA. (2018) MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors Ieee Computer Architecture Letters. 17: 175-178
Won JY, Gratz PV, Shakkottai S, et al. (2016) Resource sharing centric dynamic voltage and frequency scaling for CMP cores, uncore, and memory Acm Transactions On Design Automation of Electronic Systems. 21
Kim J, Fedorov V, Gratz PV, et al. (2015) Dynamic memory pressure aware ballooning Acm International Conference Proceeding Series. 5: 103-112
Kim H, Boga SBK, Vitkovskiy A, et al. (2015) Use it or lose it: Proactive, deterministic longevity in future chip multiprocessors Acm Transactions On Design Automation of Electronic Systems. 20
Rasheed S, Gratz PV, Shakkottai S, et al. (2015) STORM: A simple traffic-optimized router microarchitecture for networks-on-chip Proceedings - 2014 8th Ieee/Acm International Symposium On Networks-On-Chip, Nocs 2014. 176-177
Vitkovskiy A, Soteriou V, Gratz PV. (2015) Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects Proceedings of the 33rd Ieee International Conference On Computer Design, Iccd 2015. 117-124
Li C, Gratz PV, Palermo S. (2015) Nano-Photonic networks-on-chip for future chip multiprocessors More Than Moore Technologies For Next Generation Computer Design. 155-186
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