Joseph A. Zambreno, Ph.D.
Affiliations: | 2006 | Northwestern University, Evanston, IL |
Area:
Computer Science, Electronics and Electrical EngineeringGoogle:
"Joseph Zambreno"Parents
Sign in to add mentor| Alok Choudhary | grad student | 2006 | Northwestern | |
| (Compiler and architectural approaches to software protection and security.) | ||||
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Publications
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| Olufowobi H, Young C, Zambreno J, et al. (2020) SAIDuCANT: Specification-Based Automotive Intrusion Detection Using Controller Area Network (CAN) Timing Ieee Transactions On Vehicular Technology. 69: 1484-1494 |
| Saha S, Duwe H, Zambreno J. (2020) CyNAPSE: A Low-power Reconfigurable Neural Inference Accelerator for Spiking Neural Networks Journal of Signal Processing Systems. 92: 907-929 |
| Young C, Zambreno J, Olufowobi H, et al. (2019) Survey of Automotive Controller Area Network Intrusion Detection Systems Ieee Design & Test of Computers. 36: 48-55 |
| Grieve A, Davies M, Jones PH, et al. (2018) ARMOR: A Recompilation and Instrumentation-Free Monitoring Architecture for Detecting Memory Exploits Ieee Transactions On Computers. 67: 1092-1104 |
| Zhang P, Mills A, Zambreno J, et al. (2017) The design and integration of a software configurable and parallelized coprocessor architecture for LQR control Journal of Parallel and Distributed Computing. 106: 121-131 |
| Wang X, Jones PH, Zambreno J. (2016) A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns Acm Sigarch Computer Architecture News. 43: 76-81 |
| Nelson C, Townsend KR, Attia OG, et al. (2016) RAMPS: A Reconfigurable Architecture for Minimal Perfect Sequencing Ieee Transactions On Parallel and Distributed Systems. 27: 3029-3043 |
| Townsend KR, Attia OG, Jones PH, et al. (2015) A scalable unsegmented multiport memory for FPGA-based systems International Journal of Reconfigurable Computing. 2015 |
| Attia OG, Townsend KR, Jones PH, et al. (2015) A reconfigurable architecture for the detection of Strongly Connected Components Acm Transactions On Reconfigurable Technology and Systems. 9 |
| Johnson T, Roggow D, Jones PH, et al. (2015) An FPGA Architecture for the Recovery of WPA/WPA2 Keys Journal of Circuits, Systems, and Computers. 24: 1550105 |