Yun-Shiang Shu, Ph.D.
Affiliations: | 2007 | Electrical Engineering (Elec Circ and Sys) and Cog Sci | University of California, San Diego, La Jolla, CA |
Area:
Electronics and Electrical EngineeringGoogle:
"Yun-Shiang Shu"Parents
Sign in to add mentorBang-Sup Song | grad student | 2007 | UCSD | |
(Background digital calibration techniques for high-speed, high resolution analog-to-digital data converters.) |
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Publications
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Shu Y, Kuo L, Lo T. (2016) An Oversampling SAR ADC With DAC Mismatch Error Shaping Achieving 105 dB SFDR and 101 dB SNDR Over 1 kHz BW in 55 nm CMOS Ieee Journal of Solid-State Circuits. 51: 2928-2940 |
Shu Y, Kamiishi J, Tomioka K, et al. (2010) LMS-Based Noise Leakage Calibration of Cascaded Continuous-Time $\Delta\Sigma$ Modulators Ieee Journal of Solid-State Circuits. 45: 368-379 |
Shu YS, Kyung M, Lee WM, et al. (2009) A 10∼15-bit 60-MS/s floating-point ADC with digital gain and offset calibration Ieee Journal of Solid-State Circuits. 44: 2356-2365 |
Shu Y, Song B. (2008) A 15-bit Linear 20-MS/s Pipelined ADC Digitally Calibrated With Signal-Dependent Dithering Ieee Journal of Solid-State Circuits. 43: 342-350 |