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BETA: Related publications
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|Bijansky S, Lee SK, Aziz A. (2009) TuneLogic: Post-Silicon tuning of dual-Vdd designs Proceedings of the 10th International Symposium On Quality Electronic Design, Isqed 2009. 394-400|
|Mohammad B, Bijansky S, Aziz A, et al. (2008) Adaptive SRAM memory for low power and high yield 26th Ieee International Conference On Computer Design 2008, Iccd. 176-181|
|Bijansky S, Aziz A. (2008) TuneFPGA: Post-silicon tuning of dual-Vdd FPGAs Proceedings - Design Automation Conference. 796-799|