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Spyros Tragoudas

Affiliations: 
Electrical and Computer Engineering Southern Illinois University at Carbondale, Carbondale, IL 
Area:
Electronics and Electrical Engineering, Computer Science
Website:
https://engineering.siu.edu/elec/faculty-staff/faculty/tragoudas.php
Google:
"Spyros Tragoudas"
Bio:

https://www.proquest.com/openview/ac437266605e4b254287753b56375647/1

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Parents

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Fillia Makedon grad student 1991 UT Dallas (Robotree)
 (VLSI partitioning approximation algorithms based on multicommodity flow and other techniques)

Children

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Maria K. Michael grad student 2002 SIU Carbondale
Saravanan Padmanaban grad student 2003 SIU Carbondale
Mohammed M. Khan grad student 2006 SIU Carbondale
Khadija Stewart grad student 2006 SIU Carbondale
Mahilchi M. Vaseekar Kumar grad student 2006 SIU Carbondale
Arkan Abdulrahman grad student 2008 SIU Carbondale
Rajsekhar Adapa grad student 2008 SIU Carbondale
Edward Flanigan grad student 2009 SIU Carbondale
Manoj K. Goparaju grad student 2009 SIU Carbondale
Michael N. Skoufis grad student 2009 SIU Carbondale
Sreenivas Gangadhar grad student 2012 SIU Carbondale
Dheepakkumaran Jayaraman grad student 2012 SIU Carbondale
Kedar Karmarkar grad student 2013 SIU Carbondale
Ashok K. Palaniswamy grad student 2014 SIU Carbondale

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Publications

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Javvaji PK, Tragoudas S. (2020) Test Pattern Generation and Critical Path Selection in the Presence of Statistical Delays Ieee Transactions On Very Large Scale Integration Systems. 28: 163-173
Javvaji PK, Tragoudas S. (2019) On the Sensitization Probability of a Critical Path Considering Process Variations and Path Correlations Ieee Transactions On Very Large Scale Integration Systems. 27: 1196-1205
Gnawali KP, Mozaffari SN, Tragoudas S. (2018) Low Power Spintronic Ternary Content Addressable Memory Ieee Transactions On Nanotechnology. 17: 1206-1216
Mozaffari SN, Tragoudas S. (2018) Maximizing the Number of Threshold Logic Functions Using Resistive Memory Ieee Transactions On Nanotechnology. 17: 897-905
Mozaffari SN, Tragoudas S, Haniotakis T. (2018) A Generalized Approach to Implement Efficient CMOS-Based Threshold Logic Functions Ieee Transactions On Circuits and Systems I-Regular Papers. 65: 946-959
Leitner S, Wang H, Tragoudas S. (2017) Design Techniques for Direct Digital Synthesis Circuits with Improved Frequency Accuracy over Wide Frequency Ranges Journal of Circuits, Systems, and Computers. 26: 1750035
Dara CB, Haniotakis T, Tragoudas S. (2017) Delay Analysis for Current Mode Threshold Logic Gate Designs Ieee Transactions On Very Large Scale Integration Systems. 25: 1063-1071
Watkins A, Tragoudas S. (2017) Radiation Hardened Latch Designs for Double and Triple Node Upsets Ieee Transactions On Emerging Topics in Computing. 8: 616-626
Mozaffari SN, Tragoudas S, Haniotakis T. (2017) More Efficient Testing of Metal-Oxide Memristor–Based Memory Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 1018-1029
Somashekar AM, Tragoudas S. (2017) Diagnosis of Performance Limiting Segments in Integrated Circuits Using Path Delay Measurements Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 36: 325-335
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