Shahin Nazarian, Ph.D.

2006 University of Southern California, Los Angeles, CA, United States 
Electronics and Electrical Engineering
"Shahin Nazarian"


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Massoud Pedram grad student 2006 USC
 (Timing analysis of coupled interconnect and CMOS logic cells in the presence of crosstalk noise.)
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Nazarian S, Fatemi H, Pedram M. (2011) Accurate timing and noise analysis of combinational and sequential logic cells using current source modeling Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 92-103
Nazarian S, Pedram M. (2008) Crosstalk-affected delay analysis in nanometer technologies International Journal of Electronics. 95: 903-937
Nazarian S, Pedram M. (2007) Gain-based cell delay modeling 2006 International Symposium On Vlsi Design, Automation and Test, Vlsi-Dat 2006 - Proceedings of Technical Papers. 179-182
Fatemi H, Nazarian S, Pedram M. (2007) A current-based method for short circuit power calculation under noisy input waveforms Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 774-779
Fatemi H, Nazarian S, Pedram M. (2006) Statistical logic cell delay analysis using a current-based model Proceedings - Design Automation Conference. 253-256
Pedram M, Nazarian S. (2006) Thermal modeling, analysis, and management in VLSI circuits: Principles and methods Proceedings of the Ieee. 94: 1487-1501
Sinha A, Nazarian S, Mak TM. (2006) Simulating the effects of process variations on capacitive crosstalk Proceedings of the Ieee International Conference On Electronics, Circuits, and Systems. 604-607
Nazarian S, Pedram M. (2006) Cell delay analysis based on rate-of-current change Proceedings -Design, Automation and Test in Europe, Date. 1
Nazarian S, Pedram M, Gupta SK, et al. (2006) STAX: Statistical crosstalk target set compaction Proceedings -Design, Automation and Test in Europe, Date. 2
Nazarian S, Iranli A, Pedram M. (2006) Crosstalk analysis in nanometer technologies Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 2006: 253-258
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