Brent Goplen, Ph.D.
Affiliations: | 2006 | University of Minnesota, Twin Cities, Minneapolis, MN |
Area:
Electronics and Electrical EngineeringGoogle:
"Brent Goplen"Parents
Sign in to add mentor| Sachin Sapatnekar | grad student | 2006 | UMN | |
| (Advanced placement techniques for future VLSI circuits.) | ||||
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Publications
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| Yu X, Gluschenkov O, Zamdmer ND, et al. (2011) Chip-level power-performance optimization through thermally-driven across-chip variation (ACV) reduction Technical Digest - International Electron Devices Meeting, Iedm. 25.3.1-25.3.4 |
| Goplen B, Sapatnekar S. (2007) Placement of 3D ICs with thermal and interlayer via considerations Proceedings - Design Automation Conference. 626-631 |
| Goplen B, Sapatnekar SS. (2006) Placement of thermal vias in 3-D ICs using various thermal objectives Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 692-708 |
| Tsai JL, Chen CCP, Chen G, et al. (2006) Temperature-aware placement for SOCs Proceedings of the Ieee. 94: 1502-1517 |
| Zhan Y, Goplen B, Sapatnekar SS. (2006) Electrothermal analysis and optimization techniques for nanoscale integrated circuits Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 2006: 219-222 |
| Ababei C, Feng Y, Goplen B, et al. (2005) Placement and routing in 3D integrated circuits Ieee Design and Test of Computers. 22: 520-531 |
| Goplen B, Sapatnekar S. (2005) Thermal via placement in 3D ICs Proceedings of the International Symposium On Physical Design. 167-174 |
| Goplen B, Saxena P, Sapatnekar S. (2005) Net weighting to reduce repeater counts during placement Proceedings - Design Automation Conference. 503-508 |
| Goplen B, Sapatnekar S. (2003) Efficient Thermal Placement of Standard Cells in 3D ICs using a Force Directed Approach Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 86-89 |